Semiconductor device and method for manufacturing the same

• US 9,276,091 B2
• Filed: 04/16/2015
• Issued: 03/01/2016
• Est. Priority Date: 05/31/2012
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Hondo, Suguru, Shimomura, Akihisa, Koyama, Masaki, Kurata, Motomu, Hanaoka, Kazuya, Nagamatsu, Sho, Nei, Kosei, Hasegawa, Toru
• Primary Examiner(s): Pham, Thanh V
• Application Number:
  US14/688,199
• Publication Number:
  US 20150221754A1
• Time in Patent Office: 320 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/46 Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 manufacture of electrodes thereon H01L21/44
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A transistor including an oxide semiconductor film, which has stable electric characteristics is provided. A transistor including an oxide semiconductor film, which has excellent on-state characteristics is also provided. A semiconductor device in which an oxide semiconductor film having low resistance is formed and the resistance of a channel region of the oxide semiconductor film is increased. Note that an oxide semiconductor film is subjected to a process for reducing the resistance to have low resistance. The process for reducing the resistance of the oxide semiconductor film may be a laser process or heat treatment at a temperature higher than or equal to 450° C. and lower than or equal to 740° C., for example. A process for increasing the resistance of the channel region of the oxide semiconductor film having low resistance may be performed by plasma oxidation or implantation of oxygen ions, for example.

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first insulating layer over an oxide semiconductor layer;

forming a sacrificial layer overlapping with a part of the oxide semiconductor layer with the first insulating layer interposed therebetween;

forming a second insulating layer over the sacrificial layer;

removing a part of the second insulating layer and a part of the sacrificial layer so that a top surface of the sacrificial layer is exposed and the top surface of the sacrificial layer is substantially flush with a top surface of the rest of the second insulating layer;

removing the sacrificial layer, thereby forming a third insulating layer which does not cover a part of the first insulating layer;

supplying oxygen into a region of the oxide semiconductor layer after removing the sacrificial layer;

forming a conductive layer over the first insulating layer and the third insulating layer after the supplying oxygen; and

forming a gate electrode by processing the conductive layer so that a top surface of the third insulating layer is exposed and a top surface of the processed conductive layer is substantially flush with the top surface of the third insulating layer, and

wherein the region does not overlap with the third insulating layer.

2. The method for manufacturing a semiconductor device according to claim 1, further comprising the steps of:

forming the oxide semiconductor layer over an insulating surface; and

performing a first treatment so that a resistance of the oxide semiconductor layer is reduced,

wherein the step of forming the first insulating layer is performed after performing the first treatment, and

wherein the first treatment is performed before forming any layer over and in contact with the oxide semiconductor layer.

3. The method for manufacturing a semiconductor device according to claim 1, wherein the region is a channel region of a transistor.

4. The method for manufacturing a semiconductor device according to claim 2, wherein heat treatment at a temperature higher than or equal to 450°

C. and lower than or equal to 740°

C. is performed in the first treatment.

5. The method for manufacturing a semiconductor device according to claim 2, further comprising the step of forming a fourth insulating layer comprising the insulating surface, wherein the fourth insulating layer contains excess oxygen.

6. The method for manufacturing a semiconductor device according to claim 2, further comprising the step of forming a fifth insulating layer over and in contact with the oxide semiconductor layer after performing the first treatment, wherein the fifth insulating layer contains excess oxygen.

19. The method for manufacturing a semiconductor device according to claim 1, wherein the step of supplying oxygen is performed so that a resistance of only the region is increased.

7. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first insulating layer over an oxide semiconductor layer;

forming a sacrificial layer overlapping with a part of the oxide semiconductor layer with the first insulating layer interposed therebetween;

forming a second insulating layer over the sacrificial layer;

removing a part of the second insulating layer and a part of the sacrificial layer so that a top surface of the sacrificial layer is exposed and the top surface of the sacrificial layer is substantially flush with a top surface of the rest of the second insulating layer;

removing the sacrificial layer, thereby forming a third insulating layer which does not cover a part of the first insulating layer;

supplying oxygen into a region of the oxide semiconductor layer after removing the sacrificial layer;

forming a conductive layer over the first insulating layer and the third insulating layer after the supplying oxygen; and

forming a gate electrode by processing the conductive layer so that a top surface of the third insulating layer is exposed and a top surface of the processed conductive layer is substantially flush with the top surface of the third insulating layer,

wherein the region does not overlap with the third insulating layer, and

wherein plasma oxidation is performed in the step of supplying oxygen.

8. The method for manufacturing a semiconductor device according to claim 7, further comprising the steps of:

forming the oxide semiconductor layer over an insulating surface; and

performing a first treatment so that a resistance of the oxide semiconductor layer is reduced,

wherein the step of forming the first insulating layer is performed after performing the first treatment, and

wherein the first treatment is performed before forming any layer over and in contact with the oxide semiconductor layer.

9. The method for manufacturing a semiconductor device according to claim 7, wherein the region is a channel region of a transistor.

10. The method for manufacturing a semiconductor device according to claim 8, wherein heat treatment at a temperature higher than or equal to 450°

C. and lower than or equal to 740°

C. is performed in the first treatment.

11. The method for manufacturing a semiconductor device according to claim 8, further comprising the step of forming a fourth insulating layer comprising the insulating surface, wherein the fourth insulating layer contains excess oxygen.

12. The method for manufacturing a semiconductor device according to claim 8, further comprising the step of forming a fifth insulating layer over and in contact with the oxide semiconductor layer after performing the first treatment, wherein the fifth insulating layer contains excess oxygen.

13. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first insulating layer over an oxide semiconductor layer;

forming a sacrificial layer overlapping with a part of the oxide semiconductor layer with the first insulating layer interposed therebetween;

forming a second insulating layer over the sacrificial layer;

removing a part of the second insulating layer and a part of the sacrificial layer so that a top surface of the sacrificial layer is exposed and the top surface of the sacrificial layer is substantially flush with a top surface of the rest of the second insulating layer;

removing the sacrificial layer, thereby forming a third insulating layer which does not cover a part of the first insulating layer;

supplying oxygen into a region of the oxide semiconductor layer after removing the sacrificial layer;

forming a conductive layer over the first insulating layer and the third insulating layer after the supplying oxygen; and

forming a gate electrode by processing the conductive layer so that a top surface of the third insulating layer is exposed and a top surface of the processed conductive layer is substantially flush with the top surface of the third insulating layer,

wherein the region does not overlap with the third insulating layer, and

wherein implantation of oxygen ions is performed in the step of supplying oxygen.

14. The method for manufacturing a semiconductor device according to claim 13, further comprising the steps of:

forming the oxide semiconductor layer over an insulating surface; and

performing a first treatment so that a resistance of the oxide semiconductor layer is reduced,

wherein the step of forming the first insulating layer is performed after performing the first treatment, and

wherein the first treatment is performed before forming any layer over and in contact with the oxide semiconductor layer.

15. The method for manufacturing a semiconductor device according to claim 13, wherein the region is a channel region of a transistor.

16. The method for manufacturing a semiconductor device according to claim 14, wherein heat treatment at a temperature higher than or equal to 450°

C. and lower than or equal to 740°

C. is performed in the first treatment.

17. The method for manufacturing a semiconductor device according to claim 14, further comprising the step of forming a fourth insulating layer comprising the insulating surface, wherein the fourth insulating layer contains excess oxygen.

18. The method for manufacturing a semiconductor device according to claim 14, further comprising the step of forming a fifth insulating layer over and in contact with the oxide semiconductor layer after performing the first treatment, wherein the fifth insulating layer contains excess oxygen.