Optoelectronic device and method for manufacturing the same

• US 9,276,164 B2
• Filed: 11/26/2012
• Issued: 03/01/2016
• Est. Priority Date: 11/26/2012
• Status: Active Grant

• Current Assignee: Epistar Corporation
• Original Assignee: Epistar Corporation
• Inventors: Hsu, Tzu Chieh, Lin, Ching-Pei, Hsu, Yen Ming, Wei, Shou-Chin
• Primary Examiner(s): Gebreyesus, Yosef
• Application Number:
  US13/684,647
• Publication Number:
  US 20140145224A1
• Time in Patent Office: 1,191 Days
• Field of Search: 257/13, 257/79, 257/81, 257/88, 257/E31.13, 257/E33.001, 257/E33.067, 257 93-104
• US Class Current: 1/1
• CPC Class Codes: H01L 2933/0025 relating to coatings
• CPC Class Codes: H01L 2933/0091 Scattering means in or on the semiconductor body or semiconductor body package H01L33/22 takes precedence
• CPC Class Codes: H01L 33/0062 for devices with an active region comprising only III-V compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating

Abstract

A method of fabricating an optoelectronic device, comprising: providing a first substrate; forming an epitaxial stack on the first substrate wherein the epitaxial stack comprising a first conductive-type semiconductor layer, an active layer and a second conductive-type semiconductor layer; etching an upper surface of the second conductive-type semiconductor layer and forming a first texture profile on the upper surface of the second conductive-type semiconductor layer; forming a passivation layer on the upper surface of the second conductive-type semiconductor layer; and etching an upper surface of the passivation layer forming a second texture profile on the upper surface of the passivation layer wherein the first texture profile is different from the second texture profile.

Claims

1. An optoelectronic device comprising:

a first substrate;

an epitaxial stack formed on the first substrate wherein the epitaxial stack comprising a first conductive-type semiconductor layer, an active layer and a second conductive-type semiconductor layer wherein the upper surface of the second conductive-type semiconductor layer comprising a flat region and a first texture region comprising a first texture profile;

a first electrode formed directly on the flat region; and

a first passivation layer formed on the upper surface of the second conductive-type semiconductor layer,

wherein the upper surface of the first passivation layer comprises a second texture profile not corresponding to, random and different from the first texture profile, and

wherein an average depth of the second texture profile is larger than an average depth of the first texture profile.

2. The optoelectronic device of claim 1, wherein the material of the epitaxial stack contains one element selected from the group consisting of Al, Ga, In, As, P, and N.

3. The optoelectronic device of claim 1, wherein the depth of the first texture profile can be 10 nm-5000 nm.

4. The optoelectronic device of claim 1, wherein the depth of the second texture profile can be 10 nm-5000 nm.

5. The optoelectronic device of claim 1, wherein a first refractive index (n₁) of the first passivation layer is smaller than a second refractive index (n₂) of the second conductive-type semiconductor layer.

6. The optoelectronic device of claim 5, wherein the first refractive index (n₁) of the first passivation layer can be 2.4>

n₁≧

1.9, and the second refractive index (n₂) of the second conductive-type semiconductor layer can be 3.3≧

n₂≧

2.4.

7. The optoelectronic device of claim 5, further comprising a second passivation layer formed on the first passivation layer, wherein the second passivation layer comprises a third textured profile and a third refractive index (n3), and the third refractive index (n3) is smaller than first refractive index (n1).

8. The optoelectronic device of claim 1, wherein the first textured profile comprises pores, voids, pinholes, cavities or porous structure.

9. The optoelectronic device of claim 1, wherein the first textured profile has a form of circles, hexagons, dodecagons, conical or pyramidal shapes.

10. The optoelectronic device of claim 1, wherein the second textured profile comprises circles, hexagons, dodecagons, cones, or pyramids and with an average depth of the second profile being larger than the average depth of the first profile to increase the critical angle.

11. The optoelectronic device of claim 1, wherein a second electrode is formed on the first conductive-type semiconductor layer and said second electrode is covered with an adhesive layer.

12. The optoelectronic device of claim 1, wherein the first passivation layer is directly formed on the second conductive-type semiconductor layer.

13. The optoelectronic device of claim 1, wherein the first texture region surrounds the flat region.

14. The optoelectronic device of claim 1, wherein the first passivation layer contacts a side surface of the first electrode.

15. The optoelectronic device of claim 1, further comprising a second passivation layer formed on the first passivation layer,

wherein an upper surface of the second passivation layer comprises a third texture profile not corresponding to, random and different from the first texture profile and the second texture profile.

16. The optoelectronic device of claim 15, wherein the second passivation layer contacts a side surface of the first electrode.

17. The optoelectronic device of claim 15, wherein the third texture profile surrounds the first electrode.

18. An optoelectronic device comprising:

a first substrate;

an epitaxial stack formed on the first substrate wherein the epitaxial stack comprises a first conductive-type semiconductor layer, an active layer and a second conductive-type semiconductor layer wherein the upper surface of the second conductive-type semiconductor layer comprises a flat region and a first texture region comprising a first texture profile;

a first electrode formed directly on the flat region; and

a first passivation layer formed on and contiguous with the first texture region,

wherein the upper surface of the first passivation layer comprises a second texture profile, random and different from the first texture profile, and

wherein an average depth of the second texture profile is larger than an e depth of the first texture profile.

19. The optoelectronic device of claim 18, wherein the first passivation layer is directly formed on the second conductive-type semiconductor layer.

20. The optoelectronic device of claim 18, wherein a second electrode is formed on the first conductive-type semiconductor layer and said second electrode is covered with an adhesive layer.

21. The optoelectronic device of claim 18, further comprising a second passivation layer formed on the first passivation layer,

wherein an upper surface of the second passivation layer comprises a third texture profile not corresponding to, random and different from the first texture profile and the second texture profile.

22. The optoelectronic device of claim 21, wherein the second passivation layer contacts a side surface of the first electrode.

23. The optoelectronic device of claim 21, wherein the third texture profile surrounds the first electrode.