Method of manufacturing semiconductor device having metal gate

• US 9,281,201 B2
• Filed: 09/18/2013
• Issued: 03/08/2016
• Est. Priority Date: 09/18/2013
• Status: Active Grant

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Guo, Ted Ming-Lang, Yeh, Chiu-Hsien, Chien, Chin-Cheng, Wu, Chun-Yuan
• Primary Examiner(s): Henry, Caleb
• Assistant Examiner(s): AMER, MOUNIR S
• Application Number:
  US14/029,824
• Publication Number:
  US 20150079777A1
• Time in Patent Office: 902 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/28176 with a treatment, e.g. annealing, after the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/321 After treatment
• CPC Class Codes: H01L 21/32134 by liquid etching only
• CPC Class Codes: H01L 21/823842 gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

A method of manufacturing a semiconductor device having a metal gate is provided. A substrate having a first conductive type transistor and a second conductive type transistor formed thereon is provided. The first conductive type transistor has a first trench and the second conductive type transistor has a second trench. A first work function layer is formed in the first trench. A hardening process is performed for the first work function layer. A softening process is performed for a portion of the first work function layer. A pull back step is performed to remove the portion of the first work function layer. A second work function layer is formed in the second trench. A low resistive metal layer is formed in the first trench and the second trench.

Claims

1. A method of manufacturing a semiconductor device having a metal gate, comprising:

providing a substrate having a first conductive type transistor and a second conductive type transistor formed thereon, the first conductive type transistor having a first trench and the second conductive type transistor having a second trench;

forming a first work function layer on the first trench and the second trench;

patterning the first work function layer to remove the first work function layer on the second trench;

after patterning the first work function layer, performing a hardening process for the patterned first work function layer;

performing a softening process for a portion of the first work function layer with a patterned photoresist layer disposed on the second trench but not on the first trench;

performing a pull back step to remove the portion of the first work function layer;

after the pull back step, forming a second work function layer in the second trench; and

forming a low resistive metal layer in the first trench and the second trench.

2. The method of manufacturing a semiconductor device having a metal gate according to claim 1, wherein the hardening process comprises an O₂ ambience treatment.

3. The method of manufacturing a semiconductor device having a metal gate according to claim 2, wherein the O₂ ambience treatment comprises an annealing process, a plasma treatment process or a chemical treatment process.

4. The method of fabricating a semiconductor device having a metal gate according to claim 3, wherein the plasma treatment process comprises using a plasma gas comprising oxygen.

5. The method of fabricating a semiconductor device having a metal gate according to claim 3, wherein the chemical treatment process comprises using a solvent comprising NH₄OH, H₂O₂ and H₂O.

6. The method of fabricating a semiconductor device having a metal gate according to claim 1, wherein the softening process comprises a dry etching process.

7. The method of manufacturing a semiconductor device having a metal gate according to claim 6, before performing the dry etching process, further comprising forming a sacrifice layer on the first work function layer.

8. The method of manufacturing a semiconductor device having a metal gate according to claim 7, wherein when performing the dry etching process, the sacrifice layer is disposed directly on the first work function layer.

9. The method of manufacturing a semiconductor device having a metal gate according to claim 7, wherein the sacrifice layer comprises an organic material.

10. The method of manufacturing a semiconductor device having a metal gate according to claim 9, wherein the organic material comprises light absorbing oxide (DUO), spin-on-glass (SOG), bottom anti-reflective coating (BARC layer), or sacrificial light absorbing material (SLAM).

11. The method of manufacturing a semiconductor device having a metal gate according to claim 7, wherein before the dry etching process, a thickness of the sacrifice layer is between 100 angstroms and 250 angstroms.

12. The method of manufacturing a semiconductor device having a metal gate according to claim 6, wherein the dry etching process comprises using a fluoride-containing gas.

13. The method of manufacturing a semiconductor device having a metal gate according to claim 12, wherein the dry etching process is performed under a condition as follows:

CF₄ between 5 and 15 sccm, H₂ between 80 and 120 sccm, N₂ between 350 and 450 sccm, and a pressure between 12 and 18 mtorr.

14. The method of manufacturing a semiconductor device having a metal gate according to claim 1, wherein the pull back step comprises a wet etching process.

15. The method of manufacturing a semiconductor device having a metal gate according to claim 14, wherein the wet etching process comprises using HF/SC₁ or HF/SC₂.

16. The method of manufacturing a semiconductor device having a metal gate according to claim 1, wherein before forming the first work function layer, further comprises forming a barrier layer on a surface of the first trench and the second trench.

17. The method of manufacturing a semiconductor device having a metal gate according to claim 1, wherein after the pull back step, the portion of the first work function near an opening of the first trench is removed.

18. The method of manufacturing a semiconductor device having a metal gate according to claim 17, wherein after the pull back step, an U-shaped first work function layer is formed wherein a topmost portion of the U-shaped first work function layer is lower than the opening of the first trench.

19. The method of manufacturing a semiconductor device having a metal gate according to claim 1, wherein the first work function layer is a P type work function metal layer and the second work function layer is an N type work function metal layer.