Trace-data processing and profiling device

• US 9,286,186 B2
• Filed: 11/07/2014
• Issued: 03/15/2016
• Est. Priority Date: 11/14/2013
• Status: Active Grant

• Current Assignee: Accemic Technologies GmbH
• Original Assignee: ACCEMIC GmbH & Co. KG
• Inventors: Weiss, Alexander, Lange, Alexander
• Primary Examiner(s): WANG, RONGFA PHILIP
• Application Number:
  US14/535,788
• Publication Number:
  US 20150143343A1
• Time in Patent Office: 494 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G01R 31/31705 Debugging aspects, e.g. using test circuits for debugging, using dedicated debugging test circuits generation of test sequences therefor G01R31/31835, using scan test therefor G01R31/318544
• CPC Class Codes: G06F 11/3466 Performance evaluation by tracing or monitoring
• CPC Class Codes: G06F 11/348 Circuit details, i.e. tracer hardware
• CPC Class Codes: G06F 11/3636 by tracing the execution of the program
• CPC Class Codes: G06F 11/3668 Software testing software testing in telephone exchanges H04M3/242, testing of hardware G06F11/22

Abstract

A trace-data processing device comprises an input to receive source-specific trace data streams comprising trace messages carrying execution-flow information on a program execution flow performed by a source device under test or under observation, hereinafter DUT. A trace-data processing unit (526, 1100) derives from the trace data stream runtime information associated with the program execution flow performed by the DUT. The trace-data processing unit comprises a message-distribution stage (1104), a plurality of parallel message-processing stages (1106.1, . . . 1106.N), and a result consolidation stage (1108) connected with the message-processing stages. The message-distribution stage (1104) distributes the received trace data stream (T1′) over the message-processing stages in the form of respective trace data sequences. The message-processing stages (1106.1, . . . 1106.N) generate from the trace data sections runtime information sequences. The result-consolidation stage (1108) composes runtime information data representing an at least partial reconstruction of the program execution flow performed by the DUT.

Claims

1. A trace-data processing device, comprising

an input, which is configured to receive at least one source-specific trace data stream that comprises trace messages carrying encoded execution-flow information on a program execution flow performed by a source device under test or under observation, hereinafter DUT;

a trace-data processing unit, which is configured to derive runtime information from the trace data stream, the runtime information being associated with the program execution flow performed by the DUT,

wherein the trace-data processing unit comprises a message-distribution stage, a plurality of parallel message-processing stages, and a result consolidation stage connected with the message-processing stages,

wherein the message-distribution stage is configured to distribute the trace data stream over the message-processing stages in the form of respective trace data sequences that include at least one trace message,

wherein the message-processing stages are each configured to generate decoded runtime information sequences from the trace data sequences, the decoded runtime information sequences being associated with a respective section of the program execution flow performed by the DUT,

wherein the result-consolidation stage is configured to receive the decoded runtime information sequences generated by the message-processing stages and to compose and provide at its output runtime information data representing an at least partial reconstruction of the program execution flow performed by the DUT.

2. The trace-data processing device of claim 1,

wherein the trace-data processing unit further comprises a pre-processing stage that is configured to determine starting points of the trace messages or identify in the trace data stream instruction synchronization messages encoding absolute instruction addresses of instructions executed by the DUT, and to provide at its output side channel information that is associated with the trace data stream and indicative of positions of instruction synchronization messages in the trace data stream, wherein

the message-distribution stage is configured to form, using the side channel information, the trace data sequences such that each trace data sequence includes at least one instruction synchronization message,

the trace-data processing stages are additionally configured to determine, using the absolute instruction addresses provided by the instruction synchronization messages in the received trace data sections, the absolute instruction addresses of those instructions executed during the program execution flow.

3. The trace-data processing device of claim 2, wherein

the input is configured to receive and internally forward the received trace data stream comprising the trace messages carrying the execution-flow information in compressed form, and wherein the trace-data processing unit is configured to decompress the execution-flow information using prestored reconstruction information, which comprises a representation of at least a fraction of a copy of a memory content of a memory of the DUT, the memory content representing

program code executable by the DUT, OR

prestored reconstruction information includes at least

a) branch-instruction information indicative of that an instruction at a respective current instruction address is a branch instruction, which is any instruction that controls the flow of program execution to proceed with an instruction other than a respective next instruction in the executable program code,

b) for a branch instruction at a respective current instruction address:

branch-offset information indicative of at least one of the following;

an address offset between the respective current instruction address and an instruction to be jumped to from the respective current instruction address in the program execution flow, or

an instruction offset between the respective current instruction and an instruction to be jumped to from the respective current instruction in the program execution flow, and

c) data-access information regarding the instruction at the current instruction address and indicative of only one of a read-type and a write-type, with respect to a data access to be executed by the DUT to a data memory of the DUT,

and wherein, at least in case the DUT uses an instruction set with variable length, the branch-offset information additionally includes length information indicative of lengths of those instructions between the current instruction and the instruction to be jumped to and the message-processing stage is configured to decode the length information and to refrain from accessing the reconstruction memory for determining instruction lengths of those instructions covered by the length information.

4. The trace-data processing device of claim 3, wherein the reconstruction information is prestored in mapped form in a coherent memory-address range of a reconstruction memory that is either internal or external to the trace-data processing device, and wherein the trace-data processing unit comprises a mapper, which is connected with the trace-data processing stages and configured to map the instruction addresses received from the trace-data processing stages to the coherent memory-address range of the memory.

5. The trace-data processing device of claim 3 , wherein each message-processing stage is configured to determine from the received at least one instruction synchronization message the respective instruction address, and to determine from the received at least one trace message and provide as an output the runtime information sequences in the form of at least one of a Jump-in information element, a Jump-out information element, or a Not-executed information element in combination with a respective instruction address, to which the respective information element is allocated.

6. The trace-data processing device of claim 3, wherein

the reconstruction information additionally comprises event information indicative of an identification of an event, to which an execution of the instruction at the current instruction address is allocated in accordance with a prestored list of events, and wherein

each message-processing stage is configured to additionally determine from the received trace message, using the reconstruction information and the list of events, any event formed by an executed instruction currently processed, and to provide an event identification element in association with the instruction execution information for the respective executed instruction in the runtime information section.

7. The trace-data processing device of claim 3, wherein the reconstruction information additionally comprises action-offset information associated with each instruction address, the action-offset information being indicative of

either an instruction address offset between the current instruction address and an instruction address of a next branch instruction, of a next data-access instruction or of a next event, in accordance with the event information, in the program execution flow,

or an instruction offset corresponding to the number of instructions between the current instruction and a next branch instruction, a next data-access instruction or a next event in the program execution flow, and wherein

each message-processing stage is configured to determine from the action-offset information that is associated with a currently processed instruction an instruction address of an instruction to be processed next by the message-processing stage.

8. The trace-data processing device of claim 3, wherein the message-processing stages are configured to generate and provide at their output the runtime information comprising at least one of the following information:

jump-out information indicative of an instruction address of an instruction that executed a jump out;

jump-in information indicative of an instruction address of an executed instruction subject to a jump in;

not-executed information indicative of an instruction address of a non-executed instruction;

event information indicative of an instruction address of a predefined event executed in the program execution flow;

waypoint information indicative of an instruction address of a waypoint in the program execution flow;

clock-cycle information indicative of a number of processor clock cycles of the DUT between two executed events;

a current context identifier of an instruction executed;

a current instruction set to which an instruction executed belongs;

any exception detected in executing a given instruction;

timestamps associated with instructions; and

a data trace comprising a value, a memory address and an access type, read or write, associated with a memory access.

9. The trace-data processing device of claim 1, wherein

the message-distribution stage is configured to assign a unique sequence identifier to each of the distributed trace data sequences and to distribute the trace data sequences to a plurality of parallel buffer memories, which are connected on their output side with the message-processing stages, and to select a respective buffer memory for a given trace data sequence from those of the buffer memories, which currently have buffer-capacity for the given trace data sequence, and wherein

the message-processing stages are configured to provide at their output side the respective sequence identifier in association with the runtime information sequence determined from a given trace data sequence received on their input side, and wherein

the message-processing stages are configured to indicate to the result-consolidation stage an availability of at least one generated runtime information sequence identifier.

10. The trace-data processing device of claim 2, wherein the pre-processing stage comprises

a speculative-message-computing stage that comprises a group of N parallel data evaluators and that is configured to receive a sequence of the trace data stream and to evaluate the given sequence of the trace data stream using the data evaluators in the form N partially overlapping evaluation windows that together cover the given sequence of the trace data stream, beginning with an evaluation starting point of a first one of the evaluation windows,

wherein each of the data evaluators is configured to evaluate in its respective evaluation window a respective subsection of the given section starting with a predefined respective offset evaluation starting point with respect to its next neighbouring evaluation window and having a width, which is equal to or larger than a predefined maximum message length, wherein the offset between the evaluation starting points of next neighbouring evaluation windows is one data step size, in particular 1 Byte,

wherein each data evaluator is configured to perform, for its given evaluation window, a message-type identification algorithm on the respective subsection beginning from the respective offset evaluation starting point, and to provide as an output either a message-type indicator, which is indicative of a message type that has been successfully identified as beginning with the respective offset starting point, which thus forms a message starting point, or an indicator of a message-identification failure,

and wherein the pre-processing stage further comprises a message-starting-point computing stage, which is configured to

receive the outputs of the speculative-message-computing stage and detect message-type indicators of predefined messages including at least an alignment synchronization message, which indicates a suitable starting point for message evaluation in the trace data stream, and associated message starting points received from the speculative-message-computing stage for a respective current sequence of the trace data stream,

determine predefined message lengths associated with the currently detected synchronization message types in units of data step size,

determine offset starting points of respective next messages in the trace data stream,

determine a carry value corresponding to a difference between the length of the identified message closest to an end point of the currently processed sequence and a distance, in terms of data step size, between the offset starting point of this identified message and the end point of the currently processed sequence, and to

determine the starting point of a next message in a next sequence of the trace data stream from the carry value.

11. The trace-data processing device of claim 10, wherein the pre-processing stage is configured to pipeline the pre-processing of consecutive sequence of the incoming trace data stream in consecutive pipe stages of a pre-processing pipeline, wherein each pipe stage comprises a speculative-message-computing stage and a message-starting point computing stage, and wherein the message-starting point computing stages of the pipe stages are configured to provide the carry value and an indicator of detection of an alignment synchronization message in the respective sequence of the trace data stream as an output to the respective next pipe stage.

12. The trace-data processing device of claim 1, further comprising a frame processing unit, which is arranged upstream from the trace-data processing unit and which is configured to

receive a serial comprehensive trace data stream that includes a plurality of source-specific trace data streams originating from more than one trace data source,

locate predefined source identifiers in the comprehensive trace data stream and extract the trace data allocated thereto so as to form a plurality of source-specific trace data streams,

internally align at least one of the source-specific trace data streams so as to remove any gaps caused by extracting sections of the trace data stream originating from a respective other trace data source, and

provide at its output separate the trace data streams for each respective trace data source.

13. The trace-data processing device of claim 2, wherein the prestored reconstruction information is provided in redundant instances in a memory unit comprising the reconstruction memory in the form of a plurality of parallel memory banks or memory devices, and wherein a memory-arbiter is connected between the trace-data-processing unit and the memory unit and configured to serve simultaneous access requests received from the message-processing stages by controlling a plurality of simultaneous accesses to the different instances of the different instances of the reconstruction information, and wherein

the memory unit comprises a cache unit with a plurality of parallel cache memories configured to cache redundant instances of a fraction the reconstruction information stored in the reconstruction memory, and wherein a cache-arbiter is connected between the trace-data-processing unit and the cache unit and configured to serve simultaneous access requests received from the message-processing stages by controlling a plurality of simultaneous accesses to the different instances of the different instances of the fraction of the reconstruction information.

14. The trace-data-processing device of claim 1, further comprising a profiling unit, which is connected with the result-consolidation unit and configured to determine from the received runtime information, profiling information comprising at least a number of repetitions of execution of instructions at predetermined instruction addresses in the program execution flow performed by the DUT,

wherein the trace-data-profiling unit comprises a cache counter unit and is configured to perform cache write and cache rewrite operations of counts of execution associated with instruction addresses executed to the cache counter unit, and upon detecting that no cache capacity exists for a current cache write operation, initiate a memory write or memory rewrite operation to an external memory for that count, which is associated with that instruction address that has not been counted for the longest time span, and to then overwrite that count by the current cache write operation, and wherein

the cache counter unit has a plurality of parallel counter caches, and wherein the trace-data-profiling unit is configured to perform cache write and cache rewrites for counts related with the same instruction address to different ones of the counter caches, and to add all those cache counts from the different counter caches that are associated with the same instruction address before initiating a memory write or memory rewrite operation in order to determine a currently cached total count with respect to that instruction address.

15. The trace-data-processing device of claim 1, further comprising a runtime information processing unit, which includes programmable units and is communicatively connected with the result-consolidation unit and with a debug server or control outputs of the trace-data-processing device, and which is configured to determine, from the received runtime information, system states of the DUT and to select and induce, in dependence on the determined system states, control operations by the debug server on the DUT or influence operation of the DUT via the control outputs.