Monolithic magnetic induction device
First Claim
1. A magnetic induction device for an integrated circuit, comprising:
- a semiconductor substrate having a first surface, and a second surface opposite the first surface, wherein a distance from the first surface to the second surface is equal to a thickness of the semiconductor substrate;
a conducting coil that forms a set of turns embedded within the semiconductor substrate and that extends from the first surface to a first depth within the semiconductor substrate that is less than the thickness of the semiconductor substrate; and
one or more conductive vias, that substantially fills one or more respective holes in the semiconductor substrate, and that extends from the second surface to the first depth, a first end of at least one of the one or more conductive vias being embedded within the semiconductor substrate at the first depth and in physical contact with the conducting coil, to a second end at the second surface of the semiconductor substrate;
wherein the set of turns embedded within the semiconductor substrate formed by the conductive coil is exclusive of the one or more conductive vias.
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Accused Products
Abstract
Providing for a monolithic magnetic induction device having low DC resistance and small surface area is described herein. By way of example, the magnetic induction device can comprise a substrate (e.g., a semiconductor substrate) having trenches formed in a bottom layer of the substrate, and holes formed in the substrate between the trenches and an upper layer of the substrate. Additionally, the magnetic induction device can comprise a conductive coil embedded or deposited within the trenches. The magnetic induction device can further comprise a set of conductive vias formed in the holes that electrically connect the bottom layer of the substrate with the upper layer. Further, one or more integrated circuit components, such as active devices, can be formed in the upper layer, at least in part above the conductive coil. The vias can be utilized to connect to integrated circuit components with the conductive coil, where suitable.
57 Citations
41 Claims
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1. A magnetic induction device for an integrated circuit, comprising:
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a semiconductor substrate having a first surface, and a second surface opposite the first surface, wherein a distance from the first surface to the second surface is equal to a thickness of the semiconductor substrate; a conducting coil that forms a set of turns embedded within the semiconductor substrate and that extends from the first surface to a first depth within the semiconductor substrate that is less than the thickness of the semiconductor substrate; and one or more conductive vias, that substantially fills one or more respective holes in the semiconductor substrate, and that extends from the second surface to the first depth, a first end of at least one of the one or more conductive vias being embedded within the semiconductor substrate at the first depth and in physical contact with the conducting coil, to a second end at the second surface of the semiconductor substrate;
wherein the set of turns embedded within the semiconductor substrate formed by the conductive coil is exclusive of the one or more conductive vias. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25)
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26. A monolithic magnetic induction device, comprising:
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a silicon substrate having a top surface and a thickness of at least 300 μ
m, a surface area of about 1 square millimeter or less, a wafer resistivity of greater than about 6 ohm-centimeters;a copper coil within the silicon substrate having a thickness greater than about 50 μ
m and less than 300 μ
m, a radius of less than about 700 μ
m, a track width below about 30 μ
m, a track spacing below about 15 μ
m, between 2 and about 7 turns, and an insulation layer between at least 2 of the turns providing an isolation thickness of about 3 μ
m or greater;an integrated circuit (IC) component formed at least in part on the top surface or within the silicon substrate; and at least one via that substantially fills one or more respective holes that extends through a portion of the silicon substrate and electrically connects at least a part of the IC component and at least a part of the copper coil. - View Dependent Claims (27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41)
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Specification