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Encryption device

  • US 9,288,040 B2
  • Filed: 08/14/2012
  • Issued: 03/15/2016
  • Est. Priority Date: 02/22/2010
  • Status: Active Grant
First Claim
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1. An encryption device comprising:

  • a register;

    an input circuitry configured to receive plain data;

    a first partial encryption circuitry configured to calculate first intermediate data from the plain data;

    a second partial encryption circuitry configured to calculate (i+1)-th intermediate data based on i-th intermediate data and an encryption key, wherein i is an integer equal to or greater than one and smaller than N, and N is a predetermined integer equal to or greater than two;

    a first transform circuitry configured to;

    transform j-th intermediate data into j-th transformed data, wherein j is an integer equal to or greater than one and equal to or smaller than N; and

    store the j-th transformed data in the register;

    a second transform circuitry configured to transform the j-th transformed data stored in the register into the j-th intermediate data;

    a third partial encryption circuitry configured to calculate encrypted data from the N-th intermediate data;

    an output circuitry configured to output the encrypted data; and

    a random number generation circuitry configured to;

    generate a random number; and

    store the random number in the register, whereinthe second partial encryption circuitry is further configured to repeat processing to calculate (j+1)-th intermediate data while j is equal to from 1 to N−

    1, the processing being repeated based on the j-th intermediate data and the encryption key, the j-th intermediate data being transformed from the j-th transformed data by the second transform circuitry,the first transform circuitry is further configured to;

    transform the random number into a transformed random number using a predetermined first transform processing; and

    transform the j-th intermediate data into the j-th transformed data,the j-th transformed data being masked with the transformed random number, andthe second transform circuitry is further configured to;

    transform the random number stored in the register into the transformed random number using the first transform processing; and

    transform the j-th transformed data stored in the register into the j-th intermediate data,the j-th intermediate data being released from the mask using the transformed random number, andthe transformed random number not being stored in the register.

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