Micro device transfer head array

• US 9,288,899 B2
• Filed: 04/08/2015
• Issued: 03/15/2016
• Est. Priority Date: 05/25/2012
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: LuxVue Techonology Corporation (Apple Inc.)
• Inventors: Golda, Dariusz, Bibl, Andreas
• Primary Examiner(s): Lee, Kyoung
• Application Number:
  US14/681,707
• Publication Number:
  US 20150216042A1
• Time in Patent Office: 342 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/6833 Details of electrostatic chucks
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 2221/68368 used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H05K 1/0284 Details of three-dimensional rigid printed circuit boards H05K1/119 takes precedence; shaping of the substrate H05K3/0014
• CPC Class Codes: H05K 1/03 Use of materials for the substrate
• CPC Class Codes: H05K 1/09 Use of materials for the conductive, e.g. metallic pattern
• CPC Class Codes: H05K 1/115 Via connections; Lands around holes or via connections H05K1/112 takes precedence
• CPC Class Codes: H05K 2201/09036 Recesses or grooves in insulating substrate recess in metallic substrate H05K2201/09745

Abstract

A micro device transfer head array and method of forming a micro device transfer array from an SOI substrate are described. In an embodiment, the micro device transfer head array includes a base substrate and a patterned silicon layer over the base substrate. The patterned silicon layer may include a silicon interconnect and an array of silicon electrodes electrically connected with the silicon interconnect. Each silicon electrode includes a mesa structure protruding above the silicon interconnect. A dielectric layer covers a top surface of each mesa structure.

Claims

1. A transfer head array comprising:

a base substrate;

an insulating layer on the base substrate;

a patterned device layer on the insulting layer, the patterned device layer comprising a trace interconnect integrally formed with an array of electrodes, wherein each electrode includes a mesa structure protruding above the trace interconnect; and

a dielectric layer covering a top surface of each mesa structure.

2. The transfer head array of claim 1, wherein the trace interconnect runs through a working area of the transfer head array including the array of electrodes.

3. The transfer head array of claim 1, further comprising a first dielectric layer covering a top surface of the trace interconnect.

4. The transfer head array of claim 3, wherein the dielectric layer overlaps a top surface of the first dielectric layer.

5. The transfer head array of claim 1, wherein each electrode further comprises an electrode lead spanning between a corresponding mesa structure and the trace interconnect.

6. The transfer head array of claim 5, wherein the electrode lead for each electrode runs perpendicular to the trace interconnect.

7. The transfer head array of claim 5, wherein the patterned device layer further comprises a second array of second electrodes integrally formed with the trace interconnect, wherein each second electrode includes a second mesa structure protruding above the trace interconnect.

8. The transfer head array of claim 7, wherein the array electrodes and the second array of second electrodes extend in opposite directions from the trace interconnect.

9. The transfer head array of claim 8, further comprising a via extending through the base substrate and in electrical connection with the trace interconnect, the array of electrodes, and the second array of second electrodes.

10. The transfer head array of claim 5, wherein the patterned device layer further comprises a second trace interconnect integrally formed with a second array of second electrodes, wherein each second electrode includes a second mesa structure protruding above the second trace interconnect, and wherein the array of electrodes and the second array of electrodes are aligned and electrically insulated from one another.

11. The transfer head array of claim 10, wherein the dielectric layer covers a top surface of each second mesa structure of the second array of second electrodes.

12. The transfer head array of claim 10, wherein the trace interconnect and the second trace interconnect run parallel with each other.

13. The transfer head array of claim 10, wherein the trace interconnect and the second trace interconnect both run through a working area of the transfer head array including the array of electrodes and the second array of second electrodes.

14. The transfer head array of claim 11, further comprising an array of trenches between the array of electrodes and the second array of second electrodes.

15. The transfer head array of claim 14, wherein the trenches are at least partially filled with the dielectric layer.

16. The transfer head array of claim 14, further comprising a first dielectric layer covering a top surface of the trace interconnect and the second trace interconnect.

17. The transfer head array of claim 16, wherein the trenches are at least partially filled with the first dielectric layer.

18. The transfer head array of claim 11, further comprising:

a via extending through the base substrate and in electrical connection with the trace interconnect and the array of electrodes; and

a second via extending through the vase substrate and in electrical connection with the second trace interconnect and the second array of second electrodes.

19. The transfer head array of claim 11, wherein each electrode further comprises an electrode lead spanning between a corresponding mesa structure and the trace interconnect, and

each second electrode further comprises a second electrode lead spanning between a corresponding second mesa structure and the second trace interconnect.

20. The transfer head array of claim 19, wherein the second electrode lead for each second electrode runs perpendicular to the second trace interconnect.