Non-deleterious technique for creating continuous conductive circuits upon the surfaces of a non-conductive substrate

• US 9,295,162 B2
• Filed: 01/07/2014
• Issued: 03/22/2016
• Est. Priority Date: 03/12/2010
• Status: Active Grant

• Current Assignee: Taiwan Green Point Enterprises Company Limited (Jabil Inc.)
• Original Assignee: Taiwan Green Point Enterprises Company Limited (Jabil Inc.)
• Inventors: Yi, Sheng-Hung, Liao, Pen-Yi
• Primary Examiner(s): Nguyen, Donghai D
• Application Number:
  US14/149,457
• Publication Number:
  US 20140116885A1
• Time in Patent Office: 805 Days
• Field of Search: 298/30, 298/46, 298/47, 298/52, 174/257, 174/261, 205/125, 430/311, 430/315, 430/945
• US Class Current: 1/1
• CPC Class Codes: C25D 5/02 Electroplating of selected surface areas
• CPC Class Codes: C25D 7/00 Electroplating characterised by the article coated
• CPC Class Codes: H05K 2203/107 Using laser light shaping a substrate by laser ablation H05K3/0026
• CPC Class Codes: H05K 3/027 the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles
• CPC Class Codes: H05K 3/185 by making a catalytic pattern by photo-imaging
• CPC Class Codes: H05K 3/188 by direct electroplating
• CPC Class Codes: H05K 3/24 Reinforcing the conductive pattern by solder coating H05K3/3457
• CPC Class Codes: Y10T 29/49126 Assembling bases
• CPC Class Codes: Y10T 29/49155 Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/49156 with selective destruction of conductive paths

Abstract

A non-deleterious method for producing a continuous conductive circuit upon a non-conductive substrate can begin with the application of a metallic base layer upon a surface of a non-conductive substrate. A circuit pattern can be created within the metallic base layer based upon a circuit design. The metallic base layer comprising the circuit pattern can be physically separated from the remainder of the metallic base layer on the non-conductive substrate. The region of the non-conductive substrate surface that encloses the circuit pattern can be called the plating region. The remainder of the non-conductive substrate surface can be called the non-plating region. A first metal layer can be added upon the metallic base layer. A second metal layer can be added upon the first metal layer of the plating region. The second metal layer can be electrically conductive and restricted from forming on the first metal layer of the non-plating region.

Claims

1. A method comprising:

applying a metallic base layer on at least one surface of a non-conductive substrate;

creating a circuit pattern on a first portion of the metallic base layer, wherein the first portion of the metallic base layer is physically separated from a second portion of the metallic base layer;

adding a first metal layer on the metallic base layer;

attaching an apparatus configured to facilitate an electroplating process to a first portion of the non-conductive substrate that lies beneath the first portion of the metallic base layer; and

performing the electroplating process to form a second metal layer on a first portion of the first metal layer that covers the first portion of the metallic base layer, wherein the second metal layer is electrically conductive, and wherein the second metal layer is prevented from being added on a second portion of the first metal layer that covers the second portion of the metallic base layer.

2. The method of claim 1, wherein said metallic base layer comprises at least one of palladium, rhodium, platinum, iridium, osmium, gold, nickel, or iron.

3. The method of claim 1, further comprising preparing the at least one surface of the non-conductive substrate for application of the metallic base layer, wherein the preparation of the at least one surface of the non-conductive substrate comprises at least one of cleaning, degreasing, etching, rinsing, drying, or polishing.

4. The method of claim 1, wherein application of the metallic base layer utilizes one of chemical vapor deposition (CVD), electrochemical deposition, atomic layer deposition, plating, or chemical solution deposition (CSD).

5. The method of claim 1, wherein, when application of the metallic base layer utilizes a liquid-based application process, the method further comprising:

submerging the non-conductive substrate in an active metal solution for a predefined amount of time; and

when the predefined amount of time has elapsed, removing the non-conductive substrate from the active metal solution.

6. The method of claim 1, wherein creating the circuit pattern further comprises:

positioning the circuit pattern at a desired location on the first portion of the non-conductive substrate; and

removing the metallic base layer from the at least one surface of the non-conductive substrate around each element of the circuit pattern.

7. The method of claim 6, wherein removal of the metallic base layer utilizes a yttrium aluminum garnet (YAG) laser.

8. The method of claim 1, wherein the addition of the first metal layer further comprises:

placing the non-conductive substrate in a chemical plating solution for a predetermined amount of time, wherein the chemical plating solution contains metallic particles to form the first metal layer; and

when the predetermined amount of time has elapsed, removing the non-conductive substrate from the chemical plating solution, wherein the first metal layer has formed on the metallic base layer.

9. The method of claim 1, further comprising, after the addition of the second metal layer, removing the second portion of the first metal layer and the second portion of the metallic base layer from the non-conductive substrate.