Continuous broken sense lead detection system

• US 9,297,846 B2
• Filed: 12/01/2012
• Issued: 03/29/2016
• Est. Priority Date: 12/01/2012
• Status: Active Grant

• Current Assignee: Keysight Technologies, Inc.
• Original Assignee: Keysight Technologies, Inc.
• Inventors: Vulovic, Marko
• Primary Examiner(s): TANG, MINH NHUT
• Application Number:
  US13/691,738
• Publication Number:
  US 20140152335A1
• Time in Patent Office: 1,214 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G01R 1/06 Measuring leads; Measuring probes G01R19/145, G01R19/165 take precedence
• CPC Class Codes: G01R 27/14 Measuring resistance by measuring current or voltage obtained from a reference source G01R27/16, G01R27/20, G01R27/22 take precedence
• CPC Class Codes: G01R 31/52 Testing for short-circuits, leakage current or ground faults
• CPC Class Codes: G01R 31/54 Testing for continuity
• CPC Class Codes: G01R 35/00 Testing or calibrating of apparatus covered by the other groups of this subclass

Abstract

Disclosed is a continuous broken sense lead detection system (“CBSLDS”) for use with a Kelvin-connected device under test (“DUT”), a power source, and detection system stimulus configured to provide a periodic stimulus voltage. The CBSLDS is configured to detect a discontinuity in a first sense lead, second sense lead, or both, that are in signal communication with the DUT. The CBSLDS includes a first transformer, second transformer, first DC-blocker, second DC-blocker, first detection module, and second detection module.

Claims

1. A continuous broken sense lead detection system (“

CBSLDS”

) for use with a Kelvin-connected device under test (“

DUT”

), a power source, and detection system stimulus configured to provide a periodic stimulus signal, where the CBSLDS is configured to detect a discontinuity in a first sense lead, second sense lead, or both, that are in signal communication with the DUT, the CBSLDS comprising;

a first transformer having a first transformer primary winding and a first transformer secondary winding, wherein the first transformer is in signal communication with the DUT via the first transformer secondary winding and the detection system stimulus via the first transformer primary winding;

a first DC-blocker, wherein the first DC-blocker is in signal communication with the first transformer secondary winding and the DUT;

a first detection module, wherein the first detection module is in signal communication with the first;

transformer primary winding and the detection system stimulus, and wherein the first detection module is configured to filter, with a first bandpass filter, a first reflected voltage signal from the first transformer primary winding, compare the bandpass filtered first reflected voltage signal against a predetermined threshold voltage signal, and geneate a first comparator signal in response to comparing the bandpass filtered first reflected voltage signal against the predetermined threshold voltage signal;

a second transformer having a second transformer primary winding and a second transformer secondary winding, wherein the second transformer is in signal communication with the DUT via the second transformer secondary winding and the detection system stimulus via the second transformer primary winding;

a second DC-blocker wherein the second DC-blocker is in signal communication with the second transformer secondary winding and the DUT; and

a second detection module, wherein the second detection module is in signal communication with the second transformer primary winding and the detection system stimulus, and wherein the second detection module is configured to filter, with a second band filter, a second reflected voltage signal from the second transformer primary winding, compare the bandpass filtered second reflected voltage signal against the predetermined threshold voltage signal, and generate a second comparator signal in response to comparing the bandpass filtered second reflected voltage signal against the predetermined threshold voltage signal.

2. The CBSLDS of claim 1, wherein the first DC-blocker is configured to block direct current from the first transformer secondary winding to the DUT and the second DC-blocker is Configured to block direct current from the second transformer secondary winding to the DUT.

3. The CBSLDS of claim 2, wherein the first DC-blocker includes a first capacitive element and the second DC-blocker includes a second capacitive element.

4. The CBSLDS of claim 3,

wherein the first DC-blocker is electrically connected between the first transformer secondary winding and the first sense lead, and

wherein the second DC-blocker is electrically connected between the second transformer secondary winding and the second sense lead.

5. The CBSLDS of claim 3,

wherein the first transformer secondary winding is in signal communication with the DUT via a first forced lead,

wherein the first DC-blocker is electrically connected between the first transformer secondary winding and the first forced lead,

wherein the second transformer secondary winding is in signal communication with the DUT via a second forced lead, and

wherein the second DC-blocker is electrically connected between the second transformer secondary winding and the second forced lead.

6. The CBSLDS of claim 3,

wherein the first DC-blocker further includes a first inductive element and first reactive element, and

wherein the second DC-blocker includes a second inductive element and second reactive element.

7. The CBSLDS of claim 2,

wherein the first detection module includes the first bandpass filter, a first comparator, and a first digital processor,

wherein the first bandpass filter is in signal communication with the first transformer primary winding, wherein the first bandpass filter is configured to bandpass filter the first reflected voltage from the first transformer primary winding, and produce the bandpass filtered first reflected signal,

wherein the first comparator is in signal communication with the first bandpass filter, wherein the first comparator is configured to receive the bandpass filtered first reflected signal, receive the predetermined threshold voltage signal, compare the bandpass filtered first reflected signal against the predetermined threshold voltage signal, and generate the first comparator signal,

wherein the first digital processor is configured to receive the first comparator signal, and determine the discontinuity in the first sense lead,

wherein the second detection module includes the second bandpass filter, a second comparator, and a second digital processor,

wherein the second bandpass filter is in signal communication with the second transformer primary winding, wherein the second bandpass filter is configured to bandpass filter the second reflected signal from the second transformer primary winding, and produce a bandpass filtered second reflected signal,

wherein the second comparator is in signal communication with the second bandpass filter, wherein the second comparator is configured to receive the bandpass filtered second reflected signal, receive the predetermined threshold voltage signal, compare the bandpass filtered second reflected signal against the predetermined threshold voltage signal, and generate the second comparator signal, and

wherein the second digital processor is configured to receive the second comparator signal, and determine the discontinuity in the second sense lead.

8. The CBSLDS of claim 7,

wherein the periodic stimulus signal has a stimulus cycle,

wherein the first comparator signal is a pulsed signal having a plurality of pulses,

wherein the first digital processor is configured to determine when one pulse of the first comparator signal exists within one stimulus cycle,

wherein the second comparator signal is a pulsed signal having a plurality of pulses, and

wherein the second digital processor is configured to determine when one pulse of the second comparator signal exists within one stimulus cycle.

9. The CBSLDS of claim 8,

wherein the first digital processor is configured to determine the discontinuity in the first sense lead when the first digital processor has determined that one pulse of the first comparator signal exists within the one stimulus cycle for a predetermined number of stimulus cycles, and

wherein the second digital processor is configured to determine the discontinuity in the second sense lead when the second digital processor has determined that one pulse of the second comparator signal exists within the one stimulus cycle for the predetermined number of stimulus cycles.

10. The CBSLDS of claim 9,

wherein the first digital processor is chosen from the group consisting of a field-programmable gate array (“

FPGA”

), application specific integrated circuit (“

ASIC”

), digital signal processor (“

DSP”

), and microprocessor, and

wherein the second digital processor is chosen from the group consisting, of a FPGA, ASIC, DSP, and microprocessor.

11. The CBSLDS of claim 8, wherein the periodic stimulus signal may he a periodic stimulus voltage signal or periodic stimulus current signal.

12. The CBSIDS of claim 11, wherein the periodic stimulus signal is produced by two separate current sources dependent on the detection system stimulus.

13. The CBSLDS of claim 1, further comprising:

a first processor that receives the first comparator signal and the periodic stimulus signal and determines the discontinuity in the first sense lead based on the received first comparator signal and the periodic stimulus signal; and

a second processor that receives the second comparator signal and the periodic stimulus signal and determines the discontinuity in the second sense lead based on the received second comparator signal and the periodic stimulus signal.

14. A method for detecting a discontinuity in a first sense lead or second sense lead for use with a Kelvin-connected device under test (“

DUT”

), the method comprising;

injecting a periodic stimulus signal into both a first transformer primary winding and a second transformer primary winding, wherein the periodic stimulus signal has a stimulus cycle, wherein the first transformer secondary winding is in signal communication with the DUT and the second transformer secondary winding is in signal communication with the DUT;

receiving a first reflected voltage signal from the first transformer primary winding and a second reflected voltage signal from the second transformer primary winding;

bandpass filtering the received first and second reflected voltage signal with first and second bandpass filters, respectively;

comparing the bandpass filtered first reflected voltage signal against a predetermined threshold signal;

comparing the bandpass filtered second reflected signal against the predetermined threshold voltage signal;

generating a first comparator signal in response to comparing the bandpass filtered first reflected signal against the predetermined threshold voltage signal; and

generating a second comparing signal in response to comparing the bandpass filtered second reflected signal against the predetermined threshold voltage signal.

15. The method of claim 14, further including blocking direct current from the first transformer secondary winding to the DUT and blocking direct current from the second transformer secondary winding to the DUT.

16. The method of claim 15, wherein;

the first comparator signal is a pulsed signal having a plurality of pulses and the second comparator signal is a signal having a plurality of pulses,

the method further comprising;

determining, with a first processor, the discontinuity in the first sense lead when one pulse of the comparator signal exists within one stimulus cycle, and

determining the discontinuity in the second sense lead when one pulse of the second comparator signal exists within one stimulus cycle.

17. The method of claim 16,

wherein determining the discontinuity in the first sense lead includes determining that one pulse of the comparator signal exists within the one stimulus cycle for a predetermining number of stimulus cycles and

wherein the discontinuity in the second sense lead includes determining that one pulse of the second comparator signal exists within the one stimulus cycle for the predetermined number of stimulus cycles.

18. The method of claim 14, further comprising:

receiving, with a first processor, the first comparator signal and the period stimulus signal;

determining, with the first processor, the discontinuity in the first sense lead based on the received first comparator signal and the periodic stimulus signal;

receiving, with a second processor, the second comparator signal and the periodic stimulus signal and

determining, with the second processor, the discontinuity in the second sense lead based on the received second comparator signal and the periodic stimulus signal.

19. A continuous broken sense lead detection system (“

CBSLDS”

) for use with a Kelvin-connected device under test (“

DUI”

), a power source, and detection system stimulus configured to provide a periodic stimulus signal, where the CBSLDS is configured to detect a discontinuity m a first sense lead, second sense lead, or both, that are in signal communication with the DUT, the CBSLDS comprising;

a first transformer having a first transformer primary winding and first transformer secondary winding, wherein the first transformer secondary winding is in signal communication with the OUT and the first transformer primary winding is in signal communication with the detection system stimulus;

means for DC-blocking the first transformer secondary winding, wherein the means for DC-blocking the first transformer secondary winding is in signal communication with the first transformer secondary winding and the DUT;

a first detection module, wherein the first detection module is in signal communication with the first transformer primary winding and the detection system stimulus, and wherein the first detection module includes means for bandpass filtering a first reflected voltage signal from the first transformer primary winding, and means for comparing the bandpass filtered first reflected voltage signal against a predetermined threshold voltage signal to generate a first comparison signal;

a second transformer having a second transformer primary winding and second transformer secondary winding, wherein the second transformer secondary winding is in signal communication with the DUT and second transformer primary winding is in signal communication with the detection system stimulus;

means for DC-blocking the second transformer secondary winding, wherein the means for DC-blocking the second transformer secondary winding is in signal communication with the second transformer secondary winding and the DUT; and

a second detection module, wherein the second detection module is in signal communication with the second transformer and the detection system stimulus, and wherein the second detection module includes means for bandpass filtering a second reflected voltage signal from the second transformer primary winding, and means for comparing the bandpass filtered second reflected voltage signal against the predetermined threshold voltage signal to generate a second comparison signal.

20. The CBSLDS of claim 19, wherein the means for DC-blocking the first transformer secondary winding includes blocking direct current from the first transformer secondary winding to the DUT and the means for DC-blocking the second transformer secondary winding includes blocking direct current from the second transformer secondary winding to the DUT.

21. The CBSLDS of claim 20,

wherein the means for DC-blocking the first transformer secondary winding is electrically connected between the first transformer secondary winding and the first sense lead, and

wherein the means for DC-blocking the second transformer secondary winding is electrically connected between the second transformer secondary winding and the second sense lead.

22. The CBSLDS of claim 20,

wherein the first transformer is in signal communication with the DUT via a first forced lead,

the means for DC-blocking the first transformer secondary winding is electrically connected between the first transformer secondary winding and the first forced lead,

wherein the second transformer secondary winding is in signal communication with the DUT via a second forced lead, and

wherein the means for DC-blocking the second transformer secondary winding is electrically connected between the second transformer secondary winding and the second forced lead.

23. The CBSLDS of claim 19, further comprising:

a first processing means that receives the first comparison signal and the periodic stimulus signal and determines the discontinuity in the first sense lead based on the received first comparison signal and the periodic stimulus signal; and

a second processing means that receives the second comparison signal and the periodic stimulus signal and determines the discontinuity in the second sense lead based on the received second comparison signal and the periodic stimulus signal.