Silicon dioxide-polysilicon multi-layered stack etching with plasma etch chamber employing non-corrosive etchants

• US 9,299,574 B2
• Filed: 01/17/2014
• Issued: 03/29/2016
• Est. Priority Date: 01/25/2013
• Status: Active Grant

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Shimizu, Daisuke, Kim, Jong Mun
• Primary Examiner(s): Lu, Jiong-Ping
• Application Number:
  US14/157,997
• Publication Number:
  US 20140213062A1
• Time in Patent Office: 802 Days
• US Class Current: 1/1
• CPC Class Codes: B81C 1/00531 Dry etching
• CPC Class Codes: H01J 37/32082 Radio frequency generated discharge H01J37/32357, H01J37/32366, H01J37/32394 and H01J37/32403 take precedence
• CPC Class Codes: H01J 37/32146 Amplitude modulation, includes pulsing
• CPC Class Codes: H01J 37/32165 Plural frequencies
• CPC Class Codes: H01J 37/3244 Gas supply means
• CPC Class Codes: H01L 21/0332 characterised by their composition, e.g. multilayer masks, materials
• CPC Class Codes: H01L 21/3065 Plasma etching; Reactive-ion etching
• CPC Class Codes: H01L 21/3081 characterised by their composition, e.g. multilayer masks, materials
• CPC Class Codes: H01L 21/31116 by dry-etching
• CPC Class Codes: H01L 21/31122 of layers not containing Si, e.g. PZT, Al2O3
• CPC Class Codes: H01L 21/31138 by dry-etching
• CPC Class Codes: H01L 21/32137 of silicon-containing layers
• CPC Class Codes: H01L 21/32139 using masks
• CPC Class Codes: H01L 21/67069 for drying etching
• CPC Class Codes: H10B 41/27 the channels comprising vertical portions, e.g. U-shaped channels
• CPC Class Codes: H10B 43/27 the channels comprising vertical portions, e.g. U-shaped channels

Abstract

Multilayered stacks having layers of silicon interleaved with layers of a dielectric, such as silicon dioxide, are plasma etched with non-corrosive process gas chemistries. Etching plasmas of fluorine source gases, such as SF₆ and/or NF₃ typically only suitable for dielectric layers, are energized by pulsed RF to achieve high aspect ratio etching of silicon/silicon dioxide bi-layers stacks without the addition of corrosive gases, such as HBr or Cl₂. In embodiments, a mask open etch and the multi-layered stack etch are performed in a same plasma processing chamber enabling a single chamber, single recipe solution for patterning such multi-layered stacks. In embodiments, 3D NAND memory cells are fabricated with memory plug and/or word line separation etches employing a fluorine-based, pulsed-RF plasma etch.

Claims

1. A method of etching a stack of silicon and dielectric layers disposed over a substrate, the method comprising:

loading the substrate into a plasma etch chamber, the substrate having a mask layer disposed over the stack of silicon and dielectric layers;

introducing process gases into the chamber, wherein the process gases comprise one part SF₆, 2-30 parts CH₄, 0.4-4 parts O₂, 1-30 parts N₂ and 1-20 parts NF₃ at a chamber pressure between 20 and 50 mT;

energizing the process gases into a plasma with RF energy of at least one frequency, wherein the RF energy is pulsed over time between an RF on state and an RF off state; and

etching, with the plasma, portions of the stack not covered by the mask layer, the etching having a selectivity to the mask layer of at least 1;

1.

2. The method of claim 1, wherein the stack comprises at least 16 bi-layers, each bi-layer having a layer of polysilicon and a layer of silicon dioxide, and wherein the mask layer comprises amorphous carbon.

3. The method of claim 1, wherein the process gases include a fluorine-containing gas and is substantially free of HBr and Cl₂.

4. The method of claim 1, wherein the RF energy comprises a plurality of frequencies pulsed synchronously with all RF frequencies in the RF off state concurrently for at least some period of time during a duty cycle of the pulse.

5. The method of claim 4, wherein the RF energy is supplied by a first generator operating at 2 MHz, a second generator operating at 60 MHz, and a third generator operating at 162 MHz, and wherein each generator is pulsed with a corresponding duty cycle, the three duty cycles synchronized to having all three generators in the RF off state concurrently for the at least some period of time.

6. The method of claim 5, wherein the period of time is between 20 and 125 μ

s.

7. The method of claim 5, wherein the first and second generators deliver a power between 4 and 8 kW, and wherein the third generator delivers a power of between 1 and 3 kW.

8. The method of claim 1, further comprising:

etching through the mask layer selectively to an overlying patterned layer with a second plasma subsequent to loading the substrate into the chamber, the second plasma comprising species energized from second process gases including COS, N₂, and O₂.

9. A method of forming a three dimensional (3D) NAND memory device, the method comprising:

loading a substrate into a plasma etch chamber, the substrate having a mask layer disposed over a stack of silicon word line gate electrode layers electrically isolated from each other by an intervening silicon-based dielectric layer;

introducing process gases into the chamber, wherein the process gases comprise one part SF₆, 2-30 parts CH₄, 0.4-4 parts O₂, 1-30 parts N₂ and 1-20 parts NF₃, at a chamber pressure between 20 and 50 mT;

energizing the process gases into a plasma with RF energy of at least one frequency, wherein the RF energy is pulsed over time between an RF on state and an RF off state; and

etching, with the plasma, vias or trenches through the thickness of the stack in regions not covered by the mask layer, the etching having a selectivity to the mask layer greater than 1;

1.

10. The method of claim 9, wherein the stack comprises at least 16 bi-layers, each bi-layer having a layer of polysilicon and a layer of silicon dioxide, and wherein the mask layer comprises amorphous carbon.

11. The method of claim 9, wherein the RF energy is supplied by a first generator operating at 2 MHz, a second generator operating at 60 MHz, and a third generator operating at 162 MHz, and wherein each generator is pulsed with a corresponding duty cycle, the three duty cycles synchronized to having all three generators in the RF off state concurrently for at least some period of time.

12. The method of claim 11, wherein the period of time is between 20 and 100 msec.