Display panel and method for producing display panel

• US 9,299,728 B2
• Filed: 11/30/2011
• Issued: 03/29/2016
• Est. Priority Date: 11/30/2011
• Status: Active Grant

• Current Assignee: JDI Design and Development GK
• Original Assignee: JOLED Inc.
• Inventors: Ono, Shinya
• Primary Examiner(s): Ahmad, Khaja
• Application Number:
  US14/357,812
• Publication Number:
  US 20140306229A1
• Time in Patent Office: 1,581 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1262 with a particular formation, treatment or coating of the substrate
• CPC Class Codes: H01L 27/153 in a repetitive configuration, e.g. LED bars
• CPC Class Codes: H01L 2933/0016 relating to electrodes
• CPC Class Codes: H01L 33/005 Processes
• CPC Class Codes: H01L 33/405 Reflective materials
• CPC Class Codes: H10K 59/122 Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/123 Connection of the pixel electrodes to the thin film transistors [TFT]
• CPC Class Codes: H10K 59/124 Insulating layers formed between TFT elements and OLED elements

Abstract

A display panel includes: a substrate; a bottom-gate thin-film transistor above the substrate and including a gate electrode, a first electrode, and a second electrode; an insulating layer above the thin-film transistor and including a contact hole penetrating the insulating layer in a thickness direction of the insulating layer; a pixel electrode above the insulating layer and electrically connected to the second electrode via the contact hole; and a height adjusting layer selectively located below the contact hole to allow the contact hole to have a bottom at a raised level.

Claims

1. A display panel, comprising:

a substrate;

a bottom-gate thin-film transistor above the substrate, the bottom-gate thin-film transistor including a gate electrode, a first electrode, and a second electrode;

a channel protective layer above the gate electrode;

an insulating layer above the bottom-gate thin-film transistor and including a contact hole penetrating the insulating layer in a thickness direction of the insulating layer;

a pixel electrode above the insulating layer and electrically connected to the second electrode via the contact hole;

a bank above the contact hole and defining an organic electroluminescence layer; and

a height adjusting layer selectively located below the contact hole to allow the contact hole to have a bottom at a raised level,

wherein the height adjusting layer and the channel protective layer are formed on a same layer and comprise a same material, and

the second electrode entirely covers a top surface and at least two side surfaces of the height adjusting layer.

2. The display panel according to claim 1,

wherein the pixel electrode is in direct contact with the second electrode.

3. The display panel according to claim 1,

wherein, in a region from a center of a contact portion between the pixel electrode and the second electrode to a channel end portion of the bottom-gate thin-film transistor that is on a side where the second electrode is located, a minimum distance between an upper surface of the second electrode and the substrate is smaller than a distance between the contact portion and the substrate.

4. The display panel according to claim 1,

wherein a maximum thickness of the insulating layer is at least a height of the bottom-gate thin-film transistor.

5. The display panel according to claim 1,

wherein a sum of a maximum thickness and a minimum thickness of the insulating layer is at least a height of the bottom-gate thin-film transistor.

6. The display panel according to claim 1,

wherein the height adjusting layer comprises an insulating material.

7. The display panel according to claim 1,

wherein the height adjusting layer comprises a conductive material.

8. The display panel according to claim 1, further comprising

a channel etching stopper layer above a channel region of the bottom-gate thin-film transistor.

9. The display panel according to claim 8,

wherein the height adjusting layer comprises a same material as a material of the channel etching stopper layer.

10. The display panel according to claim 1,

wherein a distance between an upper surface of the second electrode and the substrate at a contact portion between the pixel electrode and the second electrode is larger than a minimum distance between the upper surface of the second electrode and the substrate in a region from a center of the contact portion to a channel end portion of the bottom-gate thin-film transistor that is closer to the second electrode.

11. The display panel according to claim 1,

wherein the pixel electrode is a reflective electrode.

13. The display panel according to claim 1,

wherein the bank is directly on the pixel electrode.

15. The display panel according to claim 1,

wherein the height adjusting layer and the channel protective layer have a same thickness.

16. The display panel according to claim 1,

wherein a center of the height adjusting layer is aligned with a center of the contact hole in a width direction of the display panel.

17. The display panel according to claim 1,

wherein the height adjusting layer comprises a conductive material.

12. A method for producing a display panel, comprising:

preparing a substrate;

forming, above the substrate, a thin-film transistor including a gate electrode, a first electrode, and a second electrode;

forming, above the gate electrode, a channel protective layer;

forming, above the thin-film transistor, an insulating layer including a contact hole penetrating the insulating layer in a thickness direction of the insulating layer;

forming, above the insulating layer, a pixel electrode electrically connected to the second electrode via the contact hole;

forming, above the pixel electrode and the contact hole, a bank that defines an organic electroluminescence layer; and

selectively forming a height adjusting layer below the contact hole before the forming of an insulating layer, the height adjusting layer allowing the contact hole to have a bottom at a raised level,

wherein the height adjusting layer and the channel protective layer are formed on a same layer and comprise a same material, and

the second electrode entirely covers a top surface and at least two side surfaces of the height adjusting layer.

14. A display panel, comprising:

a substrate;

a bottom-gate thin-film transistor above the substrate, the bottom-gate thin-film transistor including a gate electrode, a first electrode, and a second electrode;

an insulating layer above the bottom-gate thin-film transistor and including a contact hole penetrating the insulating layer in a thickness direction of the insulating layer;

a pixel electrode above the insulating layer and electrically connected to the second electrode via the contact hole;

a bank above the contact hole and defining a light-emitting region;

a height adjusting layer selectively located below the contact hole to allow the contact hole to have a bottom at a raised level; and

a channel protective layer above the gate electrode,

wherein the height adjusting layer and the channel protective layer are formed on a same layer and comprise a same material, and

the second electrode entirely covers a top surface and at least two side surfaces of the height adjusting layer.

18. A method for producing a display panel, comprising:

preparing a substrate;

forming, above the substrate, a thin-film transistor including a gate electrode, a first electrode, and a second electrode;

forming, above the thin-film transistor, an insulating layer including a contact hole penetrating the insulating layer in a thickness direction of the insulating layer;

forming, above the insulating layer, a pixel electrode electrically connected to the second electrode via the contact hole;

forming, above the pixel electrode and the contact hole, a bank that defines a light-emitting region; and

selectively forming a channel protective layer and a height adjusting layer, the channel protective layer being formed above the gate electrode, the height adjusting layer being formed below the contact hole before the forming of an insulating layer, the height adjusting layer allowing the contact hole to have a bottom at a raised level,

wherein the channel protective layer and the height adjusting layer are formed on a same layer at a same time, and

the second electrode entirely covers a top surface and at least two side surfaces of the height adjusting layer.