Digital audio distribution

• US 9,301,051 B2
• Filed: 07/24/2014
• Issued: 03/29/2016
• Est. Priority Date: 09/22/2010
• Status: Active Grant

• Current Assignee: Crestron Electronics Incorporated
• Original Assignee: Crestron Electronics Incorporated
• Inventors: LaBosco, Mark, Pagano, Dario
• Primary Examiner(s): Chan, Sai-Ming
• Application Number:
  US14/339,977
• Publication Number:
  US 20140334625A1
• Time in Patent Office: 614 Days
• Field of Search: 370/498
• US Class Current: 1/1
• CPC Class Codes: H04H 20/30 by a single channel
• CPC Class Codes: H04H 20/63 to plural spots in a confined site, e.g. MATV [Master Antenna Television]
• CPC Class Codes: H04H 20/82 using signals not modulated onto a carrier
• CPC Class Codes: H04J 3/02 Details electronic switching or gating H03K17/00
• CPC Class Codes: H04R 5/00 Stereophonic arrangements stereophonic pick-ups H04R9/16, H04R11/12, H04R17/08, H04R19/10

Abstract

A master transmitter distributes a plurality of audio channels to one or more expansion receivers as a multiplexed audio stream. Control information is also transmitted between the master transmitter and the expansion receivers. Both the control information and the multiplexed audio stream are transmitted on the same cable allowing for reduced clutter and cheaper material and installation costs.

Claims

1. A device configured for transmitting a plurality of audio channels as a time division multiplexed audio stream, said device comprising:

(a) an analog audio input path, the analog audio input path comprising an analog to digital converter configured for receiving two analog audio signals and outputting a digital audio stream in Integrated Interchip Sound (I2S) format at twenty-four bits precision;

(b) a digital audio input path, the digital audio input paths comprising a sample rate converter configured for receiving a two channels of audio and outputting a digital audio stream in I2S format at twenty-four bits precision synchronized and phase locked with the analog audio input path;

(c) an address module configured for inserting a first address and a second address into unused portions of each I2S stream;

(d) a multiplexer module configured for multiplexing the I2S streams as a time division multiplexed signal with an embedded clock;

(e) a physical layer interface configured for transmitting the time-division multiplexed audio stream on a first communication path and control information on a second communication path.

2. The device of claim 1 wherein the address module is configured for successively inserting a right channel address and a left channel address in unused portions of a predefined number of sample frames for I2S stream.

3. The device of claim 2 wherein:

(a) ten sample frames of every sixteen sample frames each comprise eight multiframe position bits, a twenty-four bit right channel audio sample, a twenty-four bit left channel audio sample, a four bit portion of the right channel identification (ID) and a four bit portion of the left channel ID; and

(b) six sample frames of every sixteen sample frames each comprise eight multiframe position bits, a twenty-four bit right channel audio sample, a twenty-four bit left channel audio sample and eight unused bits.

4. The device of claim 1 wherein one of the following types of information is inserted in the unused portion of the predetermined number of sample frames:

audio metadata, audio source information, and port ID.

5. The device of claim 1 wherein the master transmitter is configured for multiplexing thirty-two I2S streams, each frame of the I2S audio streams comprising sixty-four bits encoding two channels of audio at twenty-four bit precision.

6. The device of claim 5 wherein the time division multiplexed signal comprises five hundred and twelve words, each of said words comprising a start bit, a four bit portion of a sample frame, an inverted copy of the four bit portion, two framing bits and a stop bit.

7. The device of claim 1 wherein the master transmitter is configured for multiplexing sixty-four I2S streams, each frame of the I2S audio streams comprising sixty-four bits encoding two channels of audio at twenty-four bit precision.

8. The device of claim 7 wherein the time division multiplexed signal comprises five hundred and twelve words, each of said words comprising a start bit, an eight bit portion of a sample frame, a direct current balancing bit, a framing bit and a stop bit.

9. The device of claim 1 wherein the physical layer interface is configured for transmitting the time-division multiplexed audio stream as a low voltage differential signal on a first twisted pair and transmitting the control information as a low voltage differential signal on a second twisted pair.

10. The device of claim 1 wherein the physical layer interface is configured for transmitting the time-division multiplexed audio stream and the control information on separate wavelengths over a fiber optic cable.

11. A device for receiving a time-division multiplexed audio stream and distributing demultiplexed audio signals to one or more speakers, the device comprising:

(a) a physical layer interface for receiving the time-division multiplexed audio stream on a first communication path and control information on a second communication path, the time-division multiplexed audio stream comprising a plurality of audio channels;

(b) a demultiplexer module for demultiplexing the time-division multiplexed audio stream into a plurality of Integrated Interchip Sound (I2S) streams, each I2S stream comprising two audio channels;

(c) a crosspoint configured for routing a desired I2S stream to an output path according to the control information; and

(d) the output path configured for transmitting the I2S stream to a speaker, the output path further comprising a digital signal processor, a digital to analog converter and an audio power amplifier.

12. The device of claim 11 wherein the physical layer interface comprises an auto-adjusting low voltage differential signal equalizer.

13. The device of claim 12 wherein each frame of the time-division multiplexed audio stream comprises a plurality of twelve bit words, each word 71 comprising a portion of a sample frame and being direct current balanced with an inverted copy of the portion of the sample frame and wherein the demultiplexer is further configured for checking the time-division multiplexed audio stream for errors by comparing the portion of the sample frame with an inverted copy of the portion of the sample frame.

14. The device of claim 11 wherein the digital signal processor is configured for muting the audio channel upon:

(a) a condition of the voltage of the time-division multiplexed audio stream not being within a predefined range at the equalizer;

(b) a condition of the frequency of the time-division multiplexed audio stream not being within a predefined range at the equalizer;

or

(c) a condition of the demultiplexer detecting a predetermined number of errors in the time-division multiplexed audio stream.

15. The device of claim 14 wherein the demultiplexer is configured to load a predetermined portion of the time-division multiplexed audio stream prior to processing.