Communication processor and communication processing method

• US 9,301,297 B2
• Filed: 10/26/2011
• Issued: 03/29/2016
• Est. Priority Date: 11/09/2010
• Status: Active Grant

• Current Assignee: Panasonic Intellectual Property Management Co., Ltd. (Panasonic Holdings Corporation)
• Original Assignee: Panasonic Intellectual Property Management Co., Ltd. (Panasonic Holdings Corporation)
• Inventors: Yomo, Hidekuni, Kobayashi, Kiyotaka, Matsuoka, Akihiko, Maruyama, Atsushi
• Primary Examiner(s): Louis, Vinncelas
• Application Number:
  US13/881,292
• Publication Number:
  US 20130223265A1
• Time in Patent Office: 1,616 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: H04B 1/0003 Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain digital baseband systems H04L25/00; digital modulation/demodulation H04L27/00; CDMA H04B1/707; TDMA H04B7/2643; image transmission H04N5/00
• CPC Class Codes: H04B 1/406 with more than one transmission mode, e.g. analog and digital modes
• CPC Class Codes: H04W 72/0446 Resources in time domain, e.g. slots or frames
• CPC Class Codes: H04W 88/06 adapted for operation in multiple networks or having at least two operational modes, e.g. multi-mode terminals

Abstract

A communication processor that is compatible with a plurality of communication protocols while limiting increases in circuit scale is provided. The communication processor includes a computational processing circuit resource having a plurality of programmable function units (FUs). An operation mode determination unit determines an operation mode indicating a communication protocol application state. A permitted processing time determination unit determines a permitted processing time in accordance with the determined operation mode. In accordance with the permitted processing time, a resource allocation unit divides the plurality of FUs and allocates computational resources for each communication protocol indicated by the operation mode. A region controller controls the allocated computation resources. The computational processing circuit resource outputs data from after the computational processing at the timing when the computation processing ends.

Claims

1. A communication processing apparatus comprising:

an arithmetic processing section that has a plurality of programmable arithmetic units;

a decision section that determines which operation mode is operated between a normal mode and a transmission subject mode, the operation mode being one of;

(1) only television demodulation, (2) simultaneous television demodulation and a wireless LAN processing, and (3) only wireless LAN processing, the normal mode being a mode in which the simultaneous television demodulation and the wireless LAN processing is performed mainly for a reception processing, and the transmission subject mode being a mode in which the simultaneous television demodulation and the wireless LAN processing is mainly performed for a transmission processing;

a determination section that determines a first processing time in accordance with the operation mode, the first processing time being allowable as an allowable processing time required for a reception processing of an acknowledgement signal in a communication processing;

an allocation section that distributes the plurality of arithmetic units in accordance with the first processing time and allocates an arithmetic resource to each communication scheme represented by the operation mode; and

a resource control section that controls the arithmetic resource using a processing instruction based on said each communication scheme,

wherein the transmission subject mode is a mode of an UDP (User Datagram Protocol) operation mode.

2. The communication processing apparatus according to claim 1, wherein the decision section determines the operation mode on the basis of an application or a communication protocol of a higher layer than a communication standard that defines said each communication scheme.

3. The communication processing apparatus according to claim 1, wherein the allocation section allocates the arithmetic resource to each communication scheme represented by the operation mode in accordance with allowable energy consumption and the first processing time, and determines an operation clock frequency of the arithmetic processing section and an application voltage to the arithmetic processing section, and

the resource control section controls the arithmetic resource using the processing instruction based on said each communication scheme, and controls the arithmetic processing section using the operation clock frequency and the application voltage.

4. The communication processing apparatus according to claim 1, wherein a series of functions including a combination of arithmetic operations necessary for processing based on said each communication scheme is identical regardless of a length of the first processing time.

5. The communication processing apparatus according to claim 1, wherein the arithmetic processing section comprises:

a control section that controls the plurality of arithmetic units,

a first storage section that stores a program specifying a control procedure of the control section; and

a second storage section that stores configuration information of the plurality of arithmetic units.

6. The communication processing apparatus according to claim 5, further comprising:

a third storage section that stores the program and the configuration information for each operation mode, wherein

the resource control section selects the program and the configuration information from the third storage section in accordance with said each operation mode, and writes the selected program and configuration information to the first and second storage sections.

7. The communication processing apparatus according to claim 1, wherein the arithmetic processing section comprises:

a first control section that controls a first arithmetic resource among a plurality of the arithmetic resources to which the plurality of arithmetic units are distributed; and

a second control section that controls a second arithmetic resource among the plurality of the arithmetic resources, wherein the first arithmetic resource and the second arithmetic resource are exclusive.

8. The communication processing apparatus according to claim 7, wherein the resource control section expands or reduces the first or second arithmetic resource in accordance with the first processing time.

9. The communication processing apparatus according to claim 7, wherein the resource control section controls the first arithmetic resource by the second control section, and

the first arithmetic resource includes a register that retains data under arithmetic operation immediately before being controlled by the second control section.

10. The communication processing apparatus according to claim 9, wherein

the resource control section controls the first arithmetic resource by the first control section again upon completion of arithmetic processing in the first arithmetic resource under the control of the second control section.

11. The communication processing apparatus according to claim 9, wherein the arithmetic processing section further comprises:

a first storage section that stores a program specifying a control procedure of the control section,

a second storage section that stores configuration information of the plurality of arithmetic units, and

a third storage section that stores the program and the configuration information for all of the operation modes; and

the resource control section selects the program and the configuration information from the third storage section and writes the program and the configuration information in the first and second storage sections when switching a control section that controls the first arithmetic resource between the first control section and the second control section.

12. The communication processing apparatus according to claim 1, further comprising:

a fourth storage section that temporarily accumulates and reads input to the arithmetic processing section.

13. The communication processing apparatus according to claim 1, further comprising:

a fifth storage section that includes a plurality of input ports and temporarily accumulates, and reads input to the arithmetic processing section.

14. The communication processing apparatus according to claim 13, wherein

the allocation section monitors the volume of data accumulated in the fifth storage section and allocates the arithmetic resource to said each communication scheme in accordance with the volume of data.

15. The communication processing apparatus according to claim 14, further comprising:

a notification section that notifies a transmission side of a request to change a frame length or a modulation scheme to be determined by the transmission side in accordance with the volume of data.

16. The communication processing apparatus according to claim 13, wherein the fifth storage section stores an output signal processed by the arithmetic processing section.

17. The communication processing apparatus according to claim 13, wherein the fifth storage section is a ring buffer.

18. The communication processing apparatus according to claim 1, wherein at least one communication scheme represented by the operation mode is a multiuser MIMO scheme,

the communication processing apparatus further comprising:

a frame length determination section that determines a longest frame length of a frame, and

the allocation section determines an allowable second processing time in accordance with a difference between the longest frame length and a frame length intended for the communication processing apparatus, and allocates the arithmetic resource on the basis of the first processing time and the second processing time.

19. The communication processing apparatus according to claim 1, wherein the first processing time determined by the determination section operated in the transmission subject mode is longer than in the normal mode.

20. The communication processing apparatus according to claim 19, wherein the allocation section distributes more programmable arithmetic units operated in the normal mode than in the transmission subject mode.

21. A communication processing method comprising:

determining which operation mode is operated between a normal mode and a transmission subject mode, the operation mode being one of;

(1) only television demodulation, (2) simultaneous television demodulation and a wireless LAN processing, and (3) only wireless LAN processing, the normal mode being a mode in which the simultaneous television demodulation and the wireless LAN processing is performed mainly for a reception processing, and the transmission subject mode being a mode in which the simultaneous television demodulation and the wireless LAN processing is mainly performed for a transmission processing;

determining a processing time in accordance with the operation mode, the processing time being allowable as an allowable processing time required for a reception processing of an acknowledgement signal in a communication processing;

distributing a plurality of programmable arithmetic units in accordance with the processing time and allocating an arithmetic resource to each communication scheme represented by the operation mode; and

controlling the arithmetic resource using a processing instruction based on said each communication scheme,

wherein the transmission subject mode is a mode of an UDP (User Datagram Protocol) operation mode.