×

Semiconductor device and operating method thereof

  • US 9,304,854 B2
  • Filed: 06/03/2013
  • Issued: 04/05/2016
  • Est. Priority Date: 06/04/2012
  • Status: Active Grant
First Claim
Patent Images

1. A semiconductor device comprising:

  • a controller configured to receive a request for a first memory device, determine whether or not a multi-bit error has occurred at a requested address of the first memory device, and process the request on a second memory device instead of the first memory device, when the multi-bit error has occurred,wherein the second memory device is configured to store an error address where the multi-bit error occurred at the first memory device prior to receiving the request and a normal data corresponding to the error address,wherein the controller processes the request for the first memory device when a single-bit error has occurred at the requested address of the first memory device, and registers multi-bit error occurrence information corresponding to the request address when a multi-bit error exists in data outputted from the first memory device, andwherein the second memory device is configured to store single-bit error occurrence information, and the controller removes soft error information in the single-bit error occurrence information stored in the second memory device.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×