Efficient wide range bit counter
First Claim
1. An event counter circuit formed on an integrated circuit, comprising:
- a first counter having a first capacity connected to count a number of occurrences of a first sub-set of a first event;
a second counter having a second capacity connected to count a number of occurrences of a second sub-set of the first event; and
logic circuitry connected to the first and second counters,wherein the logic circuitry provides the count of the number of occurrences of the first event as a sum of values of the first and second counters when neither of the first counter or the second counter has reached a respective capacity, andin response to a first one of the first and second counters reaching its respective capacity, the other of the first and second counters is used as an extension of the first one of the first and second counters, wherein the logic circuitry provides the count of the number of occurrences of the first event as the values of the first one of the first and second counters scaled according to the counters'"'"' relative capacities.
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Accused Products
Abstract
An efficient wide range bit counter is presented that can support a wide range of counts with scientific notation. The counting scheme is dynamically altered to maintain a balance between accuracy and performance and allows early termination to fit timing budgets. Two (or more) counters each track the number of occurrences of a corresponding subset of events, where, when none of the counters have reached their capacities, the total count is the sum of the counts for the subsets. If one of the counters reaches it capacity, the other counter is then used as an extension of this first counter and the total count is obtained by scaling the count of the extended counter. In case of early termination, the accumulated count can be compensated to approximate the full count.
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Citations
16 Claims
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1. An event counter circuit formed on an integrated circuit, comprising:
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a first counter having a first capacity connected to count a number of occurrences of a first sub-set of a first event; a second counter having a second capacity connected to count a number of occurrences of a second sub-set of the first event; and logic circuitry connected to the first and second counters, wherein the logic circuitry provides the count of the number of occurrences of the first event as a sum of values of the first and second counters when neither of the first counter or the second counter has reached a respective capacity, and in response to a first one of the first and second counters reaching its respective capacity, the other of the first and second counters is used as an extension of the first one of the first and second counters, wherein the logic circuitry provides the count of the number of occurrences of the first event as the values of the first one of the first and second counters scaled according to the counters'"'"' relative capacities. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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Specification