Semiconductor devices and structures
First Claim
Patent Images
1. An Integrated Circuit device, comprising:
- a first layer comprising first transistors;
a first metal layer overlaying said first transistors and providing at least one connection to said first transistors;
a second metal layer overlaying said first metal layer; and
a second layer comprising second transistors overlaying said second metal layer,wherein said second metal layer is connected to provide power to at least one of said second transistors; and
a connection path between said second transistors and said second metal layer,wherein said connection path comprises at least one through-layer via, andwherein said through-layer via has a diameter less than 150 nm.
1 Assignment
0 Petitions
Accused Products
Abstract
An Integrated Circuit device including: a first layer including first transistors; a first metal layer overlaying the first transistors and providing at least one connection to the first transistors; a second metal layer overlaying the first metal layer; and a second layer including second transistors overlaying the second metal layer, where the second metal layer is connected to provide power to at least one of the second transistors and a connection path between the second transistors and the second metal layer, where the connection path includes at least one through-layer via, and where the through-layer via has a diameter less than 150 nm.
-
Citations
25 Claims
-
1. An Integrated Circuit device, comprising:
-
a first layer comprising first transistors; a first metal layer overlaying said first transistors and providing at least one connection to said first transistors; a second metal layer overlaying said first metal layer; and a second layer comprising second transistors overlaying said second metal layer, wherein said second metal layer is connected to provide power to at least one of said second transistors; and a connection path between said second transistors and said second metal layer, wherein said connection path comprises at least one through-layer via, and wherein said through-layer via has a diameter less than 150 nm. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. An Integrated Circuit device, comprising:
-
a first layer comprising first transistors; a first metal layer overlaying said first transistors and providing at least one connection to said first transistors; a second metal layer overlaying said first metal layer; a second layer comprising second transistors overlaying said second metal layer; and a third metal layer overlying said second transistors, wherein at least one of said second transistors comprises a significantly different channel material than said first transistors; and a connection path between said second transistors and said second metal layer, wherein said connection path comprises at least one through-layer via, and wherein said through-layer via has a diameter less than 150 nm. - View Dependent Claims (9, 10, 11, 12, 13)
-
-
14. An Integrated Circuit device comprising:
-
a first layer comprising first transistors; a first metal layer overlaying said first transistors and providing at least one connection to said first transistors; a second metal layer overlaying said first metal layer; a second layer comprising second transistors overlaying said second metal layer; and a third metal layer overlying said second transistors; and a connection path between said second transistors and said second metal layer, wherein said connection path comprises at least one through-layer via, wherein said through-layer via has a diameter less than 150 nm, and wherein at least one of said second transistors is one of; (i) a replacement-gate transistor; (ii) a Finfet transistor;
or(iii) a double gate horizontally oriented transistor. - View Dependent Claims (15, 16, 17, 18, 19)
-
-
20. An Integrated Circuit device, comprising:
-
a first layer comprising first transistors; a first metal layer overlaying said first transistors and providing at least one connection to said first transistors; a second metal layer overlaying said first metal layer; a second layer comprising second transistors overlaying said second metal layer; and a third metal layer overlying said second transistors; and a connection path between said second transistors and said second metal layer, wherein said connection path comprises at least one through-layer via, wherein said through-layer via has a diameter less than 250 nm, and wherein at least one of said second transistors is one of; (i) a replacement-gate transistor;
or(ii) a Finfet transistor. - View Dependent Claims (21, 22, 23, 24, 25)
-
Specification