Semiconductor devices and related fabrication methods

• US 9,306,060 B1
• Filed: 11/20/2014
• Issued: 04/05/2016
• Est. Priority Date: 11/20/2014
• Status: Active Grant

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Yang, Hongning, Blomberg, Daniel J., Lin, Xin, Zhang, Zhihong, Zuo, Jiang-Kai
• Primary Examiner(s): Pham, Long
• Application Number:
  US14/548,616
• Time in Patent Office: 502 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/26513 of electrically active species
• CPC Class Codes: H01L 29/0623 Buried supplementary region, e.g. buried guard ring multi-RESURF H01L29/0634
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/0646 PN junctions
• CPC Class Codes: H01L 29/0649 Dielectric regions, e.g. SiO2 regions, air gaps
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/0865 Disposition
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/0882 Disposition
• CPC Class Codes: H01L 29/0886 Shape
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/66689 with a step of forming an insulating sidewall spacer forming insulating material on a substrate H01L21/02107
• CPC Class Codes: H01L 29/7823 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7835 with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
• CPC Class Codes: H01L 29/78624 the source and the drain regions being asymmetrical

Abstract

Semiconductor device structures and related fabrication methods are provided. An exemplary semiconductor device structure includes a body region of semiconductor material having a first conductivity type, a source region of semiconductor material having a second conductivity type within the body region, a junction isolation region of semiconductor material having the second conductivity type, a drain region of semiconductor material having the second conductivity type, and first and second drift regions of semiconductor material having the second conductivity type. The first drift region resides laterally between the drain region and the junction isolation region, the junction isolation region resides laterally between the first drift region and the second drift region, and the second drift region resides laterally between the body region and the junction isolation region.

Claims

1. A semiconductor device structure comprising:

a body region of semiconductor material having a first conductivity type;

a source region of semiconductor material within the body region, the source region having a second conductivity type opposite the first conductivity type;

a junction isolation region of semiconductor material having the second conductivity type;

a drain region of semiconductor material having the second conductivity type;

a first drift region of semiconductor material having the second conductivity type; and

a second drift region of semiconductor material having the second conductivity type, wherein;

the first drift region resides laterally between the drain region and the junction isolation region;

the junction isolation region resides laterally between the second drift region and the first drift region; and

the second drift region resides laterally between the body region and the junction isolation region.

2. The semiconductor device structure of claim 1, wherein the junction isolation region comprises a sinker region of semiconductor material having the second conductivity type residing laterally between the first drift region and the second drift region.

3. The semiconductor device structure of claim 2, wherein the junction isolation region further comprises a buried region of semiconductor material having the second conductivity type, at least a first portion of the buried region underlying a second portion of the body region residing laterally between the junction isolation region and the source region.

4. The semiconductor device structure of claim 3, the buried region comprising a corner portion of semiconductor material having the second conductivity type, wherein:

the corner portion underlies the sinker region and at least a third portion of the body region;

the corner portion abuts the first portion of the buried region; and

a dopant concentration of the corner portion is greater than a dopant concentration of the first portion of the buried region.

5. The semiconductor device structure of claim 4, wherein:

the second drift region abuts the junction isolation region;

the second portion of the body region resides laterally between the second drift region and the source region; and

at least a fourth portion of the second drift region overlies the third portion of the body region, the third portion of the body region residing vertically between the corner portion and the fourth portion of the second drift region.

6. The semiconductor device structure of claim 1, wherein:

the second drift region resides laterally between the junction isolation region and the source region,

the second drift region abuts the junction isolation region; and

a portion of the body region resides laterally between the second drift region and the source region.

7. The semiconductor device structure of claim 6, further comprising a gate structure overlying the portion of the body region.

8. The semiconductor device structure of claim 1, wherein the first drift region comprises:

a lateral drift region of semiconductor material having the second conductivity type, the lateral drift region abutting the junction isolation region; and

a drift well region of semiconductor material having the second conductivity type, wherein;

the drift well region abuts the drain region and the lateral drift region; and

the lateral drift region resides laterally between the drift well region and the junction isolation region.

9. The semiconductor device structure of claim 8, further comprising a second region of semiconductor material having the first conductivity type, wherein:

the second region has the lateral drift region and the drift well region formed therein; and

the junction isolation region resides laterally between the second region and the body region.

10. The semiconductor device structure of claim 9, further comprising a buried region of semiconductor material having the second conductivity type underlying the drift well region, wherein at least a portion of the second region resides vertically between the buried region and the drift well region.

11. The semiconductor device structure of claim 8, further comprising:

a dielectric isolation region;

an edge region of semiconductor material having the second conductivity type adjacent to the dielectric isolation region;

a second lateral drift region of semiconductor material having the second conductivity type, the second lateral drift region abutting the edge region; and

a second drift well region of semiconductor material having the second conductivity type, wherein;

the second drift well region abuts the drain region and the second lateral drift region;

the second lateral drift region resides laterally between the second drift well region and the edge region;

the second drift well region and the drift well region are symmetrical; and

the second lateral drift region and the lateral drift region are symmetrical.

12. A semiconductor device structure comprising:

a body region of semiconductor material having a first conductivity type;

a second region of semiconductor material having the first conductivity type;

a drain region of semiconductor material having a second conductivity type opposite the first conductivity type;

a source region of semiconductor material having the second conductivity type within the body region;

a junction isolation region of semiconductor material having the second conductivity type, the junction isolation region residing laterally between the body region and the second region;

a first drift region of semiconductor material having the second conductivity type within the second region, the first drift region abutting the junction isolation region and residing laterally between the drain region and the junction isolation region; and

a second drift region of semiconductor material having the second conductivity type, the second drift region abutting the junction isolation region and residing laterally between the source region and the junction isolation region.

13. The semiconductor device structure of claim 12, further comprising:

a dielectric isolation region;

an edge region of semiconductor material having the second conductivity type adjacent to the dielectric isolation region; and

a third drift region of semiconductor material having the second conductivity type within the second region, the third drift region abutting the edge region and residing laterally between the drain region and the edge region.

14. The semiconductor device structure of claim 13, wherein the first drift region and the third drift region are symmetrical.

15. The semiconductor device structure of claim 12, further comprising a buried region of semiconductor material having the second conductivity type underlying the first drift region, wherein:

at least a portion of the second region resides vertically between the buried region and the drift region; and

a width of the buried region is less than a width of the first drift region.

16. The semiconductor device structure of claim 12, further comprising a gate structure overlying a portion of the body region, wherein the portion of the body region resides laterally between the second drift region and the source region.

17. A semiconductor device structure comprising:

a P-type body region of semiconductor material;

a N-type source region of semiconductor material within the body region;

a N-type junction isolation region of semiconductor material;

a N-type drain region of semiconductor material;

a first N-type drift region of semiconductor material; and

a second N-type drift region of semiconductor material, wherein;

the first N-type drift region resides laterally between the drain region and the junction isolation region;

the junction isolation region resides laterally between the second N-type drift region and the first N-type drift region; and

the second N-type drift region resides laterally between the body region and the junction isolation region.

18. The semiconductor device structure of claim 17, wherein:

the junction isolation region comprises a N-type buried region of semiconductor material;

at least a first portion of the buried region underlies a second portion of the body region; and

the second portion of the body region resides laterally between the junction isolation region and the source region.

19. The semiconductor device structure of claim 17, further comprising a second P-type region of semiconductor material, wherein:

the first N-type drift region comprises;

a N-type lateral drift region of semiconductor material formed in the second region and abutting the junction isolation region; and

a N-type drift well region of semiconductor material formed in the second region and abutting the drain region and the lateral drift region;

the lateral drift region resides laterally between the drift well region and the junction isolation region; and

the junction isolation region resides laterally between the second region and the body region.

20. The semiconductor device structure of claim 19, further comprising a N-type buried region of semiconductor material underlying the drift well region, wherein at least a portion of the second region resides vertically between the buried region and the drift well region.