Thin film transistor array panel and display device including the same

• US 9,310,657 B2
• Filed: 02/17/2010
• Issued: 04/12/2016
• Est. Priority Date: 07/27/2004
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Kim, Dong-Gyu, Moon, Seung-Hwan, Lee, Yong-Soon, Kang, Nam-Soo, Park, Haeng-Won
• Primary Examiner(s): Patel, Kumar
• Assistant Examiner(s): Sadio, Insa
• Application Number:
  US12/707,639
• Publication Number:
  US 20100141622A1
• Time in Patent Office: 2,246 Days
• Field of Search: 345/55, 345/87, 345/88, 345 94-102, 345/173, 345/204, 345/212, 345/206
• US Class Current: 1/1
• CPC Class Codes: G02F 1/1339 Gaskets; Spacers; Sealing of cells
• CPC Class Codes: G02F 1/1345 Conductors connecting electrodes to cell terminals
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/13629 Multilayer wirings
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/78669 with inverted-type structure, e.g. with bottom gate
• CPC Class Codes: H01L 29/78678 with inverted-type structure, e.g. with bottom gate

Abstract

Gate-driving circuitry of a thin film transistor array panel is formed on the same plane as a display area of the transistor array panel. The gate-driving circuitry includes driving circuitry and signal lines having apertures. Thus, a sufficient amount of light, even though illuminated from the thin film transistor array panel side, can reach a photosetting sealant overlapping at least in part the gate-driving circuitry. The thin film transistor array panel and the counter panel are put together air-tight and moisture-tight. Consequently, the gate-driving circuitry can avoid corrosion by moisture introduced from outside. Gate-driving circuitry malfunctions can also be reduced.

Claims

1. A display device comprising:

an insulating substrate;

at least one gate line on the insulating substrate;

at least one data line insulated from the gate line;

at least one first switching element connected to the gate line and the data line; and

at least one gate driving circuit disposed on the insulating layer,

wherein the at least one gate driving circuit comprises a driving circuitry comprising at least one stage for outputting a gate signal to the gate line, the gate driving circuit further comprising a plurality of signal lines electrically connected to the driving circuitry,

and

wherein the plurality of signal lines comprises a first signal line, and wherein the first signal line comprises at least one aperture.

2. The display device of claim 1, wherein the first signal line is configured to provide the driving circuitry with a gate-off signal.

3. The display device of claim 1, wherein the first signal line is ladder- or net-shaped.

4. The display device of claim 1, wherein the first signal line further comprises a first group of branches and a second group of branches, and wherein the aperture of the first signal line is enclosed by the first group of branches and the second group of branches.

5. The display device of claim 4, wherein a width of each branch of the first and second groups of branches is between about 20 μ

m and about 30 μ

m.

6. The display device of claim 4, wherein branches of the second group of branches are between branches of the first group of branches and connect the branches of the first group of branches.

7. The display device of claim 1, wherein a width of the at least one aperture of the first signal line is between about 20 μ

m and about 30 μ

m.

8. The display device of claim 1, wherein the first signal line is disposed farther from the driving circuitry than any of the other signal lines.

9. The display device of claim 1, wherein the plurality of signal lines further comprises a second signal line not having an aperture.

10. The display device of claim 9, wherein the second signal line is configured to provide the driving circuitry with an initialization signal.

11. The display device of claim 9, wherein the second signal line is disposed between the first signal line and the driving circuitry.

12. The display device of claim 9, wherein the plurality of signal lines further comprises third and fourth signal lines disposed between the first and second signal lines, each of the third and fourth comprising at least one aperture.

13. The display device of claim 12, wherein the third and fourth signal lines are configured to provide the driving circuitry with a first clock signal and a second clock signal, respectively, where the first clock signal has a phase different from that of the second clock signal.

14. The display device of claim 9, a width of the second signal line is less than about 100 μ

m.

15. The display device of claim 1, wherein the display device further comprises:

a counter substrate facing the insulating substrate; and

a sealant disposed between the insulating substrate and the counter substrate,

wherein the first signal line is disposed in at least one of an area overlapping the sealant and an area within about 300 μ

m of the sealant.

16. The display device of claim 1, wherein the stage comprises a second switching element including the same layers as the first switching element.

17. A display device comprising:

an insulating substrate;

at least one gate line on the insulating substrate;

at least one data line insulated from the gate line;

at least one first switching element connected to the gate line and the data line; and

at least one gate driving circuit disposed on the insulating layer,

wherein the at least one gate driving circuit comprises a driving circuitry comprising at least one stage configured to output a gate signal to the gate line, the at least one gate driving circuit further comprising a plurality of signal lines electrically connected to the driving circuitry,

wherein the stage comprises a second switching element, and

wherein the second switching element comprises at least two sub-switching elements, the two sub-switching elements being connected to each other in parallel and spaced apart from each other.

18. The display device of claim 17, wherein a space between the two sub-switch elements is less than about 10 μ

m.

19. The display device of claim 17, wherein the display device further comprises:

a counter substrate facing the insulating substrate; and

a sealant disposed between the insulating substrate and the counter substrate,

wherein the second switching element is disposed in at least one of an area overlapping the sealant and an area within about 300 μ

m of the sealant.