Methods for forming FinFETS having a capping layer for reducing punch through leakage
First Claim
1. A method comprising:
- providing an intermediate semiconductor structure comprising;
a semiconductor substrate;
a fin disposed on the semiconductor substrate;
providing a first capping layer disposed over the fin;
providing first isolation fill disposed over the capping layer;
removing a portion of the first isolation fill and the first capping layer to expose an upper surface portion of the fin;
providing a second capping layer disposed over the exposed fin, and a second isolation fill over the second capping layer, the second capping layer being different from the first capping layer;
removing a portion of the second capping layer and second isolation fill to expose an upper surface of the fin; and
wherein the capping layers and a lower portion of the fin define an interface dipole layer barrier, a portion of the capping layers operable to provide an increased negative charge or an increased positive charge adjacent to the fin, to reduce punch-through leakage compared to a fin without the capping layers.
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Abstract
A method for forming FinFETs having a capping layer for reducing punch through leakage includes providing an intermediate semiconductor structure having a semiconductor substrate and a fin disposed on the semiconductor substrate. A capping layer is disposed over the fin, and an isolation fill is disposed over the capping layer. A portion of the isolation fill and the capping layer is removed to expose an upper surface portion of the fin. Tapping layer and a lower portion of the fin define an interface dipole layer barrier, a portion of the capping layer operable to provide an increased negative charge or an increased positive charge adjacent to the fin, to reduce punch-through leakage compared to a fin without the capping layer.
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Citations
14 Claims
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1. A method comprising:
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providing an intermediate semiconductor structure comprising; a semiconductor substrate; a fin disposed on the semiconductor substrate; providing a first capping layer disposed over the fin; providing first isolation fill disposed over the capping layer; removing a portion of the first isolation fill and the first capping layer to expose an upper surface portion of the fin; providing a second capping layer disposed over the exposed fin, and a second isolation fill over the second capping layer, the second capping layer being different from the first capping layer; removing a portion of the second capping layer and second isolation fill to expose an upper surface of the fin; and wherein the capping layers and a lower portion of the fin define an interface dipole layer barrier, a portion of the capping layers operable to provide an increased negative charge or an increased positive charge adjacent to the fin, to reduce punch-through leakage compared to a fin without the capping layers. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method comprising:
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providing a semiconductor substrate and a plurality of fins disposed on the semiconductor substrate; providing a first capping layer disposed over the fins, and a first isolation fill disposed over the first capping layer; removing a portion of the capping layer and the first isolation fill to expose some of the fins; providing a second capping layer disposed over the exposed fins, and a second isolation fill over the second capping layer, the second capping layer being different from the first capping layer; removing a portion of the first and second capping layers and the first and second isolation fills to expose upper surface portions of the fins; and wherein the capping layers and the lower portions of the fins define interface dipole layer barriers, portions of the capping layers operable to provide increased negative charges or increased positive charges adjacent to the fins, to reduce punch-through leakage compared to fins not having the capping layers. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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Specification