FinFET with undoped body bulk

• US 9,312,389 B2
• Filed: 10/31/2014
• Issued: 04/12/2016
• Est. Priority Date: 05/23/2014
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Ponoth, Shom, Deshpande, Hemant Vinayak
• Primary Examiner(s): Kebede, Brook
• Application Number:
  US14/529,869
• Publication Number:
  US 20150340502A1
• Time in Patent Office: 529 Days
• Field of Search: 438/149, 438/197, 438/198, 257/288
• US Class Current: 1/1
• CPC Class Codes: H01L 29/1054 with a variation of the composition, e.g. channel with strained layer for increasing the mobility
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/7851 with the body tied to the substrate
• CPC Class Codes: H01L 29/7853 the body having a non-rectangular crossection

Abstract

Systems and methods are provide to achieve undoped body bulk silicon based devices, such as field effect transistors (FETS) and Fin Field Effect Transistors (FinFETs). In an embodiment, an epitaxial growth technique is used to form the silicon of an active region of a fin of a FinFET once a punchthrough stop (PTS) layer has been formed. In an embodiment, the epitaxial growth technique according to embodiments of the present disclosure produces a fin with a small notch in the active region.

Claims

1. A Fin Field Effect Transistor (FinFET), comprising:

a source;

a drain; and

a fin positioned between the source and the drain, wherein the fin comprises;

a first portion,

a second portion, wherein the second portion forms a conducting channel between the source and the drain, and wherein the second portion comprises a notch in silicon of the second portion, and

a punchthrough stop (PTS) positioned between the first portion and the second portion, wherein the notch extends outward relative to the PTS.

2. The FinFET of claim 1, wherein the notch is approximately 2 nanometers in length.

3. The FinFET of claim 1, wherein the second portion is approximately 10 nanometers wide.

4. The FinFET of claim 1, wherein the PTS is approximately 10 nanometers thick.

5. The FinFET of claim 1, wherein the first portion is formed using a silicon recess procedure.

6. The FinFET of claim 1, wherein the second portion is formed using an epitaxial growth procedure.

7. The FinFET of claim 1, wherein the first portion is formed using a silicon recess procedure, and wherein the second portion is formed on top of the first portion using an epitaxial growth procedure.

8. The FinFET of claim 1, wherein the first portion is an inactive region formed from a well region of the FinFET.

9. The FinFET of claim 1, wherein the second portion is positioned above the PTS.

10. A Fin Field Effect Transistor (FinFET), comprising:

a source;

a drain; and

a fin positioned between the source and the drain, wherein the fin comprises;

an inactive region formed from a well region of the FinFET,

a punchthrough stop (PTS) positioned above the inactive region, and

an active region positioned above the PTS, wherein the active region forms a conducting channel between the source and the drain, and wherein the active region comprises a notch in silicon of the active region extending outward from the PTS and the inactive region.

11. The FinFET of claim 10, wherein the source and drain are P-type, and wherein the PTS is N-type.

12. The FinFET of claim 10, wherein the source and drain are N-type, and wherein the PTS is P-type.

13. The FinFET of claim 10, further comprising:

a second source;

a second drain; and

a second fin positioned between the second source and the second drain, wherein the second fin comprises a second PTS.

14. The FinFET of claim 13, wherein the first PTS is P-type, and wherein the second PTS is N-type.

15. The FinFET of claim 10, wherein the inactive region is formed using a silicon recess procedure.

16. The FinFET of claim 10, wherein the active region is formed using an epitaxial growth procedure.

17. A method of forming a Fin Field Effect Transistor (FinFET), the method comprising:

removing a first portion of a fin of a transistor using a silicon recess procedure to form a remainder of the fin;

forming a punchthrough stop (PTS) on top of the remainder of the fin; and

forming a second portion of the fin on top of the PTS using an epitaxial growth procedure such that the second portion includes a notch in silicon of the second portion extending outwards from the PTS and the remainder of the fin.

18. The method of claim 17, wherein the remainder of the fin is an inactive region of the fin, and wherein the second portion is an active region of the fin.

19. The method of claim 17, wherein forming the second portion comprises:

forming the second portion such that the second portion is wider than the remainder of the fin.

20. A method of forming a Fin Field Effect Transistor (FinFET), the method comprising:

removing a first portion of a fin of a transistor using a silicon recess procedure to form a remainder of the fin;

forming a punchthrough stop (PTS) on top of the remainder of the fin;

cleaning the PTS; and

forming, after cleaning the PTS, a second portion of the fin on top of the PTS using an epitaxial growth procedure.