Thin-film transistor, method of manufacturing the same, and method of manufacturing backplane for flat panel display

• US 9,312,395 B2
• Filed: 07/23/2014
• Issued: 04/12/2016
• Est. Priority Date: 07/26/2013
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.), University-Industry Cooperation Group of KyungHee University
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.), University-Industry Cooperation Group of KyungHee University
• Inventors: Kim, Tae-Woong, Jang, Jin, Avis, Christophe, Seol, Young-Gug
• Primary Examiner(s): Sefer, A.
• Application Number:
  US14/339,232
• Publication Number:
  US 20150028331A1
• Time in Patent Office: 629 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/247 Amorphous materials
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous

Abstract

Provided are a thin-film transistor (TFT), a method of manufacturing the same, and a method of manufacturing a backplane for a flat panel display (FPD). The method of manufacturing the TFT according to an embodiment of the present invention includes forming a gate electrode on a substrate; forming an insulating layer on the substrate to cover the gate electrode; performing a plasma treatment on an upper surface of the insulating layer using a halogen gas; forming an oxide semiconductor layer on the insulating layer and positioned to correspond to the gate electrode; and forming source and drain electrodes on the insulating layer to contact and over portions of the oxide semiconductor layer.

Claims

1. A method of manufacturing a thin-film transistor (TFT), the method comprising:

forming a gate electrode on a substrate;

forming an insulating layer on the substrate to cover the gate electrode;

performing a plasma treatment on an upper surface of the insulating layer, the plasma treatment using a halogen gas;

forming an oxide semiconductor layer on the insulating layer and positioned to correspond to the gate electrode; and

forming source and drain electrodes on the insulating layer and over portions of the oxide semiconductor layer;

wherein the forming an insulating layer comprises forming the insulating layer by a sol-gel process using a solution comprising hafnium chloride (HfCl₄) dissolved in a solvent that includes at least one of acetonitrile and ethylene glycol.

2. The method of claim 1, wherein the halogen gas comprises nitrogen fluoride (NF₃).

3. The method of claim 1, wherein the insulating layer comprises a high dielectric oxide film.

4. The method of claim 3, wherein the insulating layer comprises hafnium oxide (HfO_x).

5. The method of claim 1, further comprising annealing the insulating layer.

6. The method of claim 1, wherein the oxide semiconductor layer comprises an amorphous metal oxide.

7. The method of claim 6, wherein the oxide semiconductor layer comprises zinc-tin oxide (ZTO).

8. The method of claim 1, wherein the forming an oxide semiconductor layer comprises forming the oxide semiconductor layer by spin coating or inkjet printing.

9. A method of manufacturing a backplane for a flat panel display (FPD), the method comprising:

forming a gate electrode on a substrate;

forming a first insulating layer on the substrate to cover the gate electrode;

performing a plasma treatment on an upper surface of the first insulating layer, the plasma treatment using a halogen gas;

forming an oxide semiconductor layer on the first insulating layer and positioned to correspond to the gate electrode;

forming source and drain electrodes on the first insulating layer and over portions of the oxide semiconductor layer;

forming a second insulating layer on the first insulating layer to cover the oxide semiconductor layer and the source and drain electrodes, the second insulating layer comprising a first hole exposing one of the source and drain electrodes; and

forming a pixel electrode on the second insulating layer and within the first hole;

wherein the forming a first insulating layer comprises forming the first insulating layer by a sol-gel process using a solution comprising hafnium chloride (HfCl₄) dissolved in a solvent that includes at least one of acetonitrile and ethylene glycol.