Semiconductor device, detection method and program
First Claim
1. A semiconductor device for detecting degradation which occurs in a semiconductor integrated circuit having a detection target circuit portion where a test is executed, comprising:
- a decision unit that judges whether the test is executed within an allowable test timing in the detection target circuit portion at each test operation frequency or not and decides a maximum test operation frequency at which the test can be executed;
a measurement unit that measures variables indicating test environment, the variables being a temperature and a voltage of where the detection target circuit portion is; and
a calculation unit that converts the maximum test operation frequency decided by the decision unit based on the temperature and the voltage measured by the measurement unit into a maximum test operation frequency at a standard temperature and a standard voltage, and calculates, based on a converted maximum test operation frequency, a degradation amount which indicates degree of degradation;
wherein the semiconductor integrated circuit has a monitor block circuit that monitors a value used by the measurement unit to measure the temperature and the voltage;
the measurement unit has an estimation unit that estimates a temperature and a voltage of where the detection target circuit portion is, every time a test is executed, based on a monitored value by the monitor block circuit which operated at a temperature and a voltage of where the detection target circuit portion is;
the calculation unit uses the temperature and the voltage estimated by the estimation unit as the temperature and the voltage measured by the measurement unit and converts the maximum test operation frequency decided by the decision unit into the maximum test operation frequency at the standard temperature and the standard voltage;
the semiconductor device further comprises n (n is an integer equal to or more than
2) of the monitor block circuits;
the measurement unit measures a measured frequency Fi (i is an integer equal to or less than n) obtained as an oscillation number of times at each monitor block circuit within a predetermined time; and
the estimation unit estimates the temperature T and the voltage V of where the detection target circuit portion is by calculating coefficients α
i, β
, α
′
i, and β
′
in an equation (eq1);
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Accused Products
Abstract
A semiconductor device and the like that can determine the performance of a semiconductor integrated circuit with higher accuracy even when test environment fluctuates. The semiconductor device detects degradation of the semiconductor integrated circuit, including measurement unit that measures temperature and voltage, decision unit that judges whether the test is executed within an allowable test timing in the detection target circuit portion at each test operation frequency and decides a maximum test operation frequency and calculation unit that converts a maximum test operation frequency into that at a standard temperature and voltage and calculates a degradation amount. The semiconductor integrated circuit has a monitor block circuit that monitors the values for the measurement unit to measure temperature and voltage. The measurement unit has estimation unit that estimates temperature and voltage of a detection target circuit portion based on the monitored values. The calculation unit uses the estimated temperature and voltage.
20 Citations
11 Claims
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1. A semiconductor device for detecting degradation which occurs in a semiconductor integrated circuit having a detection target circuit portion where a test is executed, comprising:
-
a decision unit that judges whether the test is executed within an allowable test timing in the detection target circuit portion at each test operation frequency or not and decides a maximum test operation frequency at which the test can be executed; a measurement unit that measures variables indicating test environment, the variables being a temperature and a voltage of where the detection target circuit portion is; and a calculation unit that converts the maximum test operation frequency decided by the decision unit based on the temperature and the voltage measured by the measurement unit into a maximum test operation frequency at a standard temperature and a standard voltage, and calculates, based on a converted maximum test operation frequency, a degradation amount which indicates degree of degradation; wherein the semiconductor integrated circuit has a monitor block circuit that monitors a value used by the measurement unit to measure the temperature and the voltage; the measurement unit has an estimation unit that estimates a temperature and a voltage of where the detection target circuit portion is, every time a test is executed, based on a monitored value by the monitor block circuit which operated at a temperature and a voltage of where the detection target circuit portion is; the calculation unit uses the temperature and the voltage estimated by the estimation unit as the temperature and the voltage measured by the measurement unit and converts the maximum test operation frequency decided by the decision unit into the maximum test operation frequency at the standard temperature and the standard voltage; the semiconductor device further comprises n (n is an integer equal to or more than
2) of the monitor block circuits;the measurement unit measures a measured frequency Fi (i is an integer equal to or less than n) obtained as an oscillation number of times at each monitor block circuit within a predetermined time; and the estimation unit estimates the temperature T and the voltage V of where the detection target circuit portion is by calculating coefficients α
i, β
, α
′
i, and β
′
in an equation (eq1); - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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-
9. A semiconductor device for detecting variability which occurs in pluralities of same kinds of semiconductor integrated circuits where a test is executed, comprising:
-
a decision unit that judges whether the test is executed within an allowable test timing in the detection target circuit portion at each test operation frequency or not and decides a maximum test operation frequency at which the test can be executed; a measurement unit that measures variables indicating test environment, the variables being a temperature and a voltage where the detection target circuit portion is; and a calculation unit that converts the maximum test operation frequency decided by the decision unit based on the temperature and the voltage measured by the measurement unit into a maximum test operation frequency at a standard temperature and a standard voltage, and calculates, based on a converted maximum test operation frequency, a variability amount which indicates degree of variability; wherein the semiconductor integrated circuit has a monitor block circuit that monitors a value used by the measurement unit to measure the temperature and the voltage; the measurement unit has an estimation unit that estimates a temperature and a voltage of where the detection target circuit portion is, every time a test is executed, based on a monitored value by the monitor block circuit which operated at a temperature and a voltage of where the detection target circuit portion is; the calculation unit uses the temperature and the voltage estimated by the estimation unit as the temperature and the voltage measured by the measurement unit and converts the maximum test operation frequency decided by the decision unit into the maximum test operation frequency at the standard temperature and the standard voltage; the semiconductor device further comprises n (n is an integer equal to or more than
2) of the monitor block circuits;the measurement unit measures a measured frequency Fi (i is an integer equal to or less than n) obtained as an oscillation number of times at each monitor block circuit within a predetermined time; and the estimation unit estimates the temperature T and the voltage V of where the detection target circuit portion is by calculating coefficients α
i, β
, α
′
i, and β
′
in an equation (eq1);
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10. A detection method for detecting degradation which occurs in a semiconductor integrated circuit or variability which occurs in pluralities of same kinds of semiconductor integrated circuits,
wherein the characteristic of relation among an operation frequency, temperature and a voltage of a detection target circuit portion of the semiconductor integrated circuit is approximated by an approximation formula, and the semiconductor integrated circuit has n (n is an integer equal to or more than 2) monitor block circuits that monitors a value used by the measurement unit to measure the temperature and the voltage, the method comprising: -
deciding a maximum test operation frequency at which a test can be executed within an allowable test timing in a detection target circuit portion of the semiconductor integrated circuit, using a decision unit; measuring variables indicating test environment using a measurement unit, the variables being a temperature and a voltage; calculating a maximum test operation frequency at a standard temperature and a standard voltage using the approximation formula, using the temperature, the voltage and the maximum test operation frequency and calculating, based on the maximum test operation frequency calculated, a degradation amount which indicates degree of degradation or a variability amount which indicates degree of variability, using a calculating unit; measuring a measured frequency Fi (i is an integer equal to or less than n) obtained as an oscillation number of times at each monitor block circuit within a predetermined time; and estimating temperature T and voltage V of where the detection target circuit portion is by calculating coefficients α
i, β
, α
′
i, and β
′
in an equation (eq2); - View Dependent Claims (11)
-
Specification