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Hardware trust anchors in SP-enabled processors

  • US 9,317,708 B2
  • Filed: 08/14/2009
  • Issued: 04/19/2016
  • Est. Priority Date: 08/14/2008
  • Status: Active Grant
First Claim
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1. A computing device having a hardware portion and at least one memory external to said hardware portion, said computing device comprising:

  • at least one hash register for storing a root hash of a hash tree corresponding to a secure storage area within the at least one memory external to said hardware portion, said root hash encoding information about the integrity of said secure storage area, said register constructed within said hardware portion; and

    at least one symmetric cryptographic key register physically constructed within said hardware portion at a location such that probing of said register by a user is difficult to achieve without rendering data in said register useless for its intended purpose,wherein said hardware portion includes at least one processing element with hardware circuitry capable of executing software code, and the processing element is connected to said hash register and said cryptographic key register,and wherein said computing device includes a trusted software module (TSM), said TSM having exclusive access to data or programs in said secure storage area, said TSM using said at least one hash register to verify the integrity of data fetched from said secure storage area, and said TSM using key data based on said symmetric cryptographic key register to decrypt data fetched from said secure storage area.

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