Method for fabricating sensor using multiple patterning processes

• US 9,318,629 B2
• Filed: 11/23/2012
• Issued: 04/19/2016
• Est. Priority Date: 07/26/2012
• Status: Active Grant

• Current Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.)
• Original Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.)
• Inventors: Xu, Shaoying, Xie, Zhenyu, Chen, Xu
• Primary Examiner(s): Pham, Thanh V
• Application Number:
  US14/125,444
• Publication Number:
  US 20150008435A1
• Time in Patent Office: 1,243 Days
• Field of Search: 257/59, 257/66, 257/361, 257/461, 438/69, 438/98
• US Class Current: 1/1
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 27/1461 characterised by the photosensitive area
• CPC Class Codes: H01L 27/14692 Thin film technologies, e.g. amorphous, poly, micro- or nanocrystalline silicon
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 31/02325 the optical elements not being integrated nor being directly associated with the device
• CPC Class Codes: H01L 31/0352 characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
• CPC Class Codes: H01L 31/18 Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof

Abstract

Embodiments of the invention disclose a sensor and its fabrication method, the sensor comprises: a base substrate, a group of gate lines and a group of data lines arranged as crossing each other, a plurality of sensing elements arranged in an array and defined by the group of gate lines and the group of data lines, each sensing element comprising a TFT device and a photodiode sensing device, wherein the TFT device is a bottom gate TFT; the photodiode sensing device comprises: a receiving electrode connected with a source electrode, a photodiode disposed on the receiving electrode, a transparent electrode disposed on the photodiode, and a bias line disposed on and connected with the transparent electrode, the bias line is disposed as parallel to the gate line.

Claims

1. A method for fabricating a sensor comprising:

forming a pattern of a gate line and a pattern of a gate electrode connected with the gate line on a base substrate by using a first patterning process;

forming a gate insulating layer overlaying the base substrate, and forming a pattern of an active layer on the gate insulating layer and over the gate electrode, a pattern of an ohmic layer on the active layer, a pattern of a source electrode and a drain electrode on the ohmic layer and arranged opposed to each other to form a channel, a pattern of a data line connected with the drain electrode, and a pattern of a receive electrode connected with the source electrode;

forming a pattern of a passivation protective layer on the source electrode, the drain electrode and the channel by using a second patterning process;

forming a pattern of a photodiode on the receive electrode and a pattern of a transparent electrode on the photodiode by using a third patterning process;

forming a pattern of a first passivation layer by using a fourth patterning process, the first passivation layer has a via hole over the transparent electrode;

forming a pattern of a bias line on the first passivation layer and connected with the transparent electrode through the via hole over the transparent electrode, and a pattern of a light-shield strip on the source electrode, the drain electrode and the channel by using a fifth patterning process;

wherein forming the pattern of the active layer, the pattern of the ohmic layer, the pattern of the source electrode and the drain electrode, the pattern of the data line and the pattern of the receive electrode in a same layer by using a single patterning process;

wherein for said single patterning process only one mask is used.

2. The method of claim 1, after forming the pattern of the bias line and the pattern of the light-shield strip, the method further comprises:

forming a pattern of a second passivation layer overlaying the base substrate by using a sixth patterning process.

3. The method of claim 1, wherein the photodiode is a PIN photodiode comprising an N-type semiconductor, an I-type semiconductor and a P-type semiconductor.

4. The method of claim 1, wherein the single patterning process for forming the pattern of the active layer, the pattern of the ohmic layer, the pattern of the source electrode and the drain electrode, the pattern of the data line and the pattern of the receive electrode comprises:

sequentially depositing an active semiconductor layer, an ohmic semiconductor layer and a data line metal layer, and applying a photoresist to the data line metal layer;

exposing the base substrate by using a mask having a light-transmitting portion, a partial-light-transmitting portion and a light-blocking portion;

developing and removing the photoresist corresponding to the light-transmitting portion;

etching the base substrate to form the pattern of the receive electrode, the pattern of the data line and the pattern of the active layer;

ashing the base substrate and removing the photoresist corresponding to the partial-light-transmitting portion;

etching the base substrate and removing the photoresist to form the pattern of the ohmic layer and the pattern of the source electrode and the drain electrode, the source electrode and the drain electrode are arranged opposed to each other to form the channel.

5. The method of claim 4, wherein the light-blocking portion of the mask correspondingly forms a region having the receive electrode, the data line, the source electrode and the drain electrode, and the partial-light-transmitting portion of the mask correspondingly forms a region having the channel.

6. The method of claim 1, wherein the data line, the source electrode, the drain electrode and the receive electrode are of the same material.

7. The method of claim 1, wherein the light-shield strip and the bias line are of the same material.

8. A method for fabricating a sensor comprising:

forming a pattern of a gate line and a pattern of a gate electrode connected with the gate line on a base substrate by using a first patterning process;

forming a gate insulating layer overlaying the base substrate, and forming a pattern of an active layer on the gate insulating layer and over the gate electrode, a pattern of an ohmic layer on the active layer, a pattern of a source electrode and a drain electrode on the ohmic layer and arranged opposed to each other to form a channel, a pattern of a data line connected with the drain electrode, and a pattern of a receive electrode connected with the source electrode;

forming a pattern of a passivation protective layer on the source electrode, the drain electrode and the channel by using a second patterning process;

forming a pattern of a photodiode on the receive electrode and a pattern of a transparent electrode on the photodiode by using a third patterning process;

forming a pattern of a first passivation layer by using a fourth patterning process, the first passivation layer has a via hole over the transparent electrode;

forming a pattern of a bias line on the first passivation layer and connected with the transparent electrode through the via hole over the transparent electrode, and a pattern of a light-shield strip on the source electrode, the drain electrode and the channel by using a fifth patterning process;

wherein forming the pattern of the active layer, the pattern of the ohmic layer, the pattern of the source electrode and the drain electrode, the pattern of the data line and the pattern of the receive electrode in a same layer by using two patterning processes;

wherein for said second patterning process only one mask is used.

9. The method of claim 8, after forming the pattern of the bias line and the pattern of the light-shield strip, the method further comprises:

forming a pattern of a second passivation layer overlaying the base substrate by using a sixth patterning process.

10. The method of claim 9, wherein the photodiode is a PIN photodiode comprising an N-type semiconductor, an I-type semiconductor and a P-type semiconductor.

11. The method of claim 9, wherein the two patterning process for forming the pattern of the active layer, the pattern of the ohmic layer, the pattern of the source electrode and the drain electrode, the pattern of the data line and the pattern of the receive electrode comprises:

forming the pattern of the active layer over the gate electrode and the pattern of the ohmic layer on the active layer by using a patterning process;

forming the pattern of the source electrode and the drain electrode on the ohmic layer and arranged opposed to each other to form a channel, the pattern of the data line connected with the drain electrode and the pattern of the receive electrode connected with the source electrode by using a patterning process.

12. The method of claim 9, wherein the data line, the source electrode, the drain electrode and the receive electrode are of the same material.

13. The method of claim 9, wherein the light-shield strip and the bias line are of the same material.