Gate signal adjustment circuit
First Claim
1. A circuit comprising:
- a control line from a display driver that transmits an adjustable voltage and is directly connected to a gate of one or more adjustment transistors; and
a timing circuit comprising one or more output transistors and the one or more adjustment transistors coupled together,the one or more output transistors directly connected to an output signal to transmit the output signal from the timing circuit, andthe one or more adjustment transistors adjusting at least one of a rising time and a falling time of the output signal by receiving the adjustable voltage to couple one or more adjustment signals to the output signal through a source and a drain of the one or more adjustment transistors.
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Accused Products
Abstract
A gate signal adjustment circuit for a display is disclosed. The gate signal adjustment circuit can adjust a transition time of a gate signal used to drive data displaying. The adjustment can be to either speed up or slow down the transition time according to the requirements of the display. In an example, the gate signal adjustment circuit can include multiple transistors, where a first set of the transistors outputs the gate signal and a second set of the transistors outputs an adjustment to the gate signal. The second set of transistors can be the same or different sizes depending on the desirable number of adjustment options. The circuit can also include a control line coupled to the second set of transistors to control the adjustment output. Gate signal adjustment can reduce crosstalk in the display.
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Citations
25 Claims
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1. A circuit comprising:
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a control line from a display driver that transmits an adjustable voltage and is directly connected to a gate of one or more adjustment transistors; and a timing circuit comprising one or more output transistors and the one or more adjustment transistors coupled together, the one or more output transistors directly connected to an output signal to transmit the output signal from the timing circuit, and the one or more adjustment transistors adjusting at least one of a rising time and a falling time of the output signal by receiving the adjustable voltage to couple one or more adjustment signals to the output signal through a source and a drain of the one or more adjustment transistors. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A circuit comprising:
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multiple control lines from a display driver that transmit control voltages and are directly connected to a gate of one or more adjustment transistors; and a timing circuit comprising one or more output transistors and the one or more adjustment transistors coupled together, the one or more output transistors directly connected to an output signal to transmit the output signal from the timing circuit, and the one or more adjustment transistors receiving one of the control voltages so as to adjust a transition time of the output signal based on the one control voltage by coupling an adjustment signal to the output signal through a source and a drain of the one or more adjustment transistors, the transition time being at least one of a rising time and a falling time. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. A display comprising:
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a gate signal adjustment circuit that outputs a gate signal by transmitting the gate signal through one or more output transistors, the one or more output transistors directly connected to the gate signal, and adjusts at least one of a rising time and a falling time of the gate signal according to a control voltage by coupling one or more adjustment signals through a source and a drain of the one or more adjustment transistors; a gate driver that drives the circuit; and a display driver that sends the control voltage to a gate of the one or more adjustment transistors. - View Dependent Claims (17, 18, 19)
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20. A gate signal adjustment circuit for a display comprising:
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at least one control input from a display driver; at least one gate signal output; and multiple transistors that adjust a gate signal and comprised of one or more output transistors and one or more adjustment transistors, the one or more output transistors directly connected to the at least one gate signal output to transmit the adjusted gate signal, and the one or more adjustment transistors receiving at least one control signal through the at least one control input directly connected to a gate of the one or more adjustment transistors so as to adjust at least one of a rising time and a falling time of the gate signal by coupling one or more adjustment signals to the gate signal through a source and a drain of the one or more adjustment transistors. - View Dependent Claims (21, 22)
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23. A method for adjusting a gate signal at a display comprising:
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receiving at least one control signal from a display driver at a gate of one or more transistors; adjusting a transition time of a gate signal according to the received at least one control signal by coupling one or more adjustment signals to the gate signal through a source and a drain of the one or more transistors, the transition time being at least one of a rising time and a falling time; and outputting the adjusted gate signal through one or more output transistors. - View Dependent Claims (24, 25)
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Specification