Multi-mode power amplifier architecture
First Claim
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1. Radio frequency (RF) circuitry configured to selectively operate in one of a TDD operating mode and an FDD operating mode, and comprising:
- an RF power splitter;
a time division duplex (TDD)/frequency division duplex (FDD) driver stage;
a TDD final stage, wherein during the TDD operating mode, the TDD final stage is configured to receive and amplify a first RF input signal from the RF power splitter to provide a first RF output signal; and
an FDD final stage comprising an in-phase stage and a quadrature-phase stage, wherein during the FDD operating mode, the in-phase stage is configured to receive and amplify an RF in-phase input signal from the RF power splitter to provide an RF in-phase output signal, and the quadrature-phase stage is configured to receive and amplify an RF quadrature-phase input signal from the RF power splitter to provide an RF quadrature-phase output signal,wherein the RF power splitter is coupled between an output from the TDD/FDD driver stage and corresponding inputs to each of the in-phase stage, the quadrature-phase stage, and the TDD final stage.
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Abstract
Radio frequency (RF) circuitry, which includes a time division duplex (TDD)/frequency division duplex (FDD) driver stage, a TDD final stage, an FDD final stage, and power directing circuitry, is disclosed. The power directing circuitry is coupled between the TDD/FDD driver stage and the TDD final stage, and is further coupled between the TDD/FDD driver stage and the FDD final stage.
31 Citations
19 Claims
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1. Radio frequency (RF) circuitry configured to selectively operate in one of a TDD operating mode and an FDD operating mode, and comprising:
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an RF power splitter; a time division duplex (TDD)/frequency division duplex (FDD) driver stage; a TDD final stage, wherein during the TDD operating mode, the TDD final stage is configured to receive and amplify a first RF input signal from the RF power splitter to provide a first RF output signal; and an FDD final stage comprising an in-phase stage and a quadrature-phase stage, wherein during the FDD operating mode, the in-phase stage is configured to receive and amplify an RF in-phase input signal from the RF power splitter to provide an RF in-phase output signal, and the quadrature-phase stage is configured to receive and amplify an RF quadrature-phase input signal from the RF power splitter to provide an RF quadrature-phase output signal, wherein the RF power splitter is coupled between an output from the TDD/FDD driver stage and corresponding inputs to each of the in-phase stage, the quadrature-phase stage, and the TDD final stage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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Specification