Secure method for processing a content stored within a component, and corresponding component

• US 9,323,941 B2
• Filed: 11/09/2010
• Issued: 04/26/2016
• Est. Priority Date: 11/12/2009
• Status: Active Grant

• Current Assignee: STMicroelectronics SAS (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SAS (STMicroelectronics NV)
• Inventors: Lisart, Mathieu, Marinet, Fabrice
• Primary Examiner(s): Najjar, Saleh
• Assistant Examiner(s): MEJIA, FELICIANO S
• Application Number:
  US12/942,557
• Publication Number:
  US 20110113256A1
• Time in Patent Office: 1,995 Days
• Field of Search: 713189-194, 713/167, 711/173, 711/103, 726/22, 380/28
• US Class Current: 1/1
• CPC Class Codes: G06F 11/1458 Management of the backup or restore process
• CPC Class Codes: G06F 12/1408 by using cryptography for digital transmission H04L9/00
• CPC Class Codes: G06F 21/62 Protecting access to data via a platform, e.g. using keys or access control rules
• CPC Class Codes: G06F 21/77 in smart cards
• CPC Class Codes: G06F 21/78 to assure secure storage of data address-based protection against unauthorised use of memory G06F12/14; record carriers for use with machines and with at least a part designed to carry digital markings G06K19/00
• CPC Class Codes: G06F 2212/402 Encrypted data
• CPC Class Codes: G06F 3/0623 in relation to content
• CPC Class Codes: G06F 3/0644 Management of space entities, e.g. partitions, extents, pools
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays
• CPC Class Codes: H04L 9/088 Usage controlling of secret information, e.g. techniques for restricting cryptographic keys to pre-authorized uses, different access levels, validity of crypto-period, different key- or password length, or different strong and weak cryptographic algorithms network architectures or network communication protocols for using time-dependent keys in a packet data network H04L63/068

Abstract

The component comprises a first memory (MM) comprising a first portion (P1) having a content modified with a first modification entity (K1) and a second portion (P2) having a content modified with a second entity (K2), a storage means (MS) configured to store the first entity (K1) secretly, a non-volatile memory (NVM) storing an item of entity information representative of the second entity (K2) in a location (END) designated by a first indication (INDK2) contained in the said first portion of the first memory.

Claims

1. A method for processing content stored within a component, the component comprising a first memory and a non-volatile memory, the method comprising:

modifying a first content of a first portion of the first memory with a first entity;

modifying a second content of a second portion of the first memory with a second entity, wherein the first entity is different from the second entity;

storing the first entity secretly in a storage device of the component, the first entity having a secret value used to reset a protected register;

storing an item of entity information representative of the second entity in the non-volatile memory in a location designated by a first indication contained in the first portion of the first memory;

applying an inverse modification process to the first content of the first portion of the first memory using the first entity to obtain a first indication;

after the first indication is obtained with the inverse modification process, obtaining the second entity from the item entity information contained in the non-volatile memory;

applying an inverse modification process to the second content of the second portion of the first memory using the second entity the second entity.

3. The method according to claim 1, wherein the item of entity information representative of the second entity is the second entity modified with the first entity, and, after the first indication is obtained, an inverse modification process is applied to the item of entity information by using the first entity in order to obtain the second entity.

4. The method according to claim 1, wherein the non-volatile memory has a first portion in which the item of entity information is stored, and a second portion having a third content modified with a third entity, and wherein the third entity modified with the second entity is stored in the second portion of the first memory.

5. The method according to claim 4, wherein, after an inverse modification process has been applied to the second content by using the second entity to obtain the third entity, an inverse modification process is applied to the third content of the second portion of the non-volatile memory by using the third entity.

6. The method according to claim 4, wherein at least one of the first, second, and third entities comprises an encryption key and the inverse modification process associated with the at least one of the first, second, and third entities, comprises a decryption process.

7. The method according to claim 4, wherein at least one of the first, second, and third entities comprises a scrambling key and the inverse modification process associated with the at least one of the first, second, and third entities comprises a descrambling process.

8. The method according to claim 6, wherein at least one of the contents has been both encrypted with an encryption key and mixed with a scrambling key, and the inverse modification process associated with the at least one of the first, second, and third contents comprises a decryption process and a descrambling process.

2. A method for processing content stored within a component, the component comprising a first memory and a non-volatile memory, the method comprising:

modifying a first content of a first portion of the first memory with a first entity;

modifying a second content of a second portion of the first memory with a second entity, wherein the first entity is different from the second entity;

storing the first entity secretly in a storage device of the component, the first entity having a secret value used to resent s protected register; and

storing an items of entity information representative of the second entity in the non-volatile memory in a location designated by a first indication contained in the first portion of the first memory,

wherein the item of entity information representative of the second entity is the second entity.

9. A component comprising:

a first memory comprising a first portion having a first content modified with a first entity and a second portion having a second content modified with a second entity, wherein the first entity is different from the second entity;

a storage device configured to store the first entity secretly, the first entity having a secret value used to reset a protected register;

a non-volatile memory storing an item of entity information representative of the second entity in a location designated by a first indication contained in the first portion of the first memory;

a first processor configured to apply an inverse modification process to the first content of the first portion of the first memory;

a second processor configured to apply an inverse modification process to the second content of the second portion of the first memory; and

a controller configured to activate first the first processor with the first entity, then to obtain, after an inverse modification process on the first content with the first entity, the second entity from the item of entity information contained in the non-volatile memory and to activate the second processor with the second entity.

11. The component according to claim 9, wherein the item of entity information is the second entity modified with the first entity, the component further comprising an auxiliary processor structurally identical to the first processor and configured to apply an inverse modification process to the item of entity information, wherein the controller is also capable, after having obtained the first indication, of activating the auxiliary processor with the first entity so as to obtain the second entity.

12. The component according to claim 9, wherein the first processor and the second processor are structurally identical.

13. The component according claim 9, wherein the non-volatile memory comprises a first portion configured to store the item of entity information, and a second portion having a third content modified with a third entity, the second portion of the first memory storing the third entity modified with the second entity.

14. The component according to claim 13, further comprising:

a third processor configured to apply an inverse modification process to the third content of the second portion of the non-volatile memory, wherein the controller is also capable of activating the third processor with the third entity delivered by the second processor.

15. The component according to claim 14, in which the third processor is structurally identical to the first processor and second processor.

16. The component according to claim 13, in which at least one of the first, second, and third entities comprises an encryption key and the processor associated with the at least one of the first, second, and third entities is configured to apply a key decryption algorithm.

17. The component according to claim 13, wherein at least one of the first, second, and third entities comprises an encryption key and the processor associated with the at least one of the first, second, and third entities comprises a logic circuit that can be structurally configured according to at least a portion of the encryption key.

18. The component according to claim 13, wherein at least one of the first, second, and third entities comprises a scrambling key and the processor associated with the at least one of the first, second, and third entities comprises an additional circuit configured to apply a descrambling operation.

10. A component comprising:

a first memory comprising a first portion having a first content modified with a first entity and a second portion having a second content modified with a second entity, wherein the first entity is different from the second entity;

a storage device configured to store the first entity secretly, the first entity having a secret value used to reset a protected register; and

a non-volatile memory storing an item of entity information representative of the second entity in a location designated by a first indication contained in the first portion of the first memory;

wherein the item of entity information representative of the second entity is the second entity.

19. The component according to claim 10, wherein the non-volatile memory is selected from the group consisting of a memory of an electrically programmable and erasable type, and FLASH memory.

20. A smart card containing a component according to claim 10.

21. A component, comprising:

a first memory comprising a first portion having a first content modified with a first entity and a second portion having a second content modified with a second entity, wherein the first entity is different from the second entity;

a storage device configured to store the first entity; and

a non-volatile memory comprising a first portion and a second portion having a third content modified with a third entity, wherein the non-volatile memory stores the second entity in a location in the first portion of the non-volatile memory designated by a first indication contained in the first portion of the first memory, and

wherein the second portion of the first memory stores the third entity, and the third entity is different from the first entity and the second entity.

22. The component of claim 21, further comprising:

a first processor configured to apply an inverse modification process to the first content;

a second processor configured to apply an inverse modification process to the second content;

a third processor configured to apply an inverse modification process to the third content; and

a controller configured to

activate first the first processor with the first entity,

then to obtain, after an inverse modification process on the first content with the first entity, the second entity contained in the first portion of the non-volatile memory,

activate the second processor with the second entity,

then to obtain, after an inverse modification process on the second content with the second entity, the third entity contained in the second portion of the first memory, and

activate the third processor with the third entity.

23. The component of claim 22, wherein the first portion of the non-volatile memory has a fourth content modified with the first entity, and the component further comprises:

an auxiliary processor configured to apply an inverse modification process to the fourth content, wherein the controller is also capable, after having obtained the first indication, of activating the auxiliary processor with the first entity so as to obtain the second entity. entity so as to obtain the said second entity.