Semiconductor device and manufacturing method thereof

• US 9,324,881 B2
• Filed: 12/11/2014
• Issued: 04/26/2016
• Est. Priority Date: 12/04/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei
• Primary Examiner(s): Pham, Hoai V
• Application Number:
  US14/567,282
• Publication Number:
  US 20150097188A1
• Time in Patent Office: 502 Days
• Field of Search: 257/59, 257/60, 257/72
• US Class Current: 1/1
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A semiconductor device includes an oxide semiconductor layer including a crystalline region over an insulating surface, a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode layer over the gate insulating layer in a region overlapping with the crystalline region. The crystalline region includes a crystal whose c-axis is aligned in a direction substantially perpendicular to a surface of the oxide semiconductor layer.

Claims

1. A semiconductor device comprising:

an oxide semiconductor layer including a crystalline region over a substrate;

a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer; and

a gate electrode layer over the oxide semiconductor layer,

wherein the crystalline region includes a crystal whose c-axis is aligned in a direction within ±

10°

from a perpendicular direction to a surface of the oxide semiconductor layer.

2. The semiconductor device according to claim 1, wherein a hydrogen concentration of the oxide semiconductor layer is 5×

10¹⁹/cm³ or less.

3. The semiconductor device according to claim 1, wherein an energy band gap of the oxide semiconductor layer is 3.0 eV to 3.5 eV.

4. The semiconductor device according to claim 1, wherein the oxide semiconductor layer contains indium, gallium and zinc.

5. The semiconductor device according to claim 1, wherein an off-state current of the semiconductor device is 1×

10<sup>−

13</sup> A or less when a drain voltage is +1 V or +10 V, and a gate voltage is set from −

5 V to −

20 V.

6. The semiconductor device according to claim 1, further comprising a gate insulating layer covering the source electrode layer and the drain electrode layer.

7. The semiconductor device according to claim 1, wherein the semiconductor device is one selected from the group consisting of a personal computer, a personal digital assistant, an electronic book, a cellular phone, a digital camera, and a television set.

8. A semiconductor device comprising:

an oxide semiconductor layer including a crystalline region over a substrate;

a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer; and

a gate electrode layer over the oxide semiconductor layer,

wherein the crystalline region includes a crystal whose c-axis is aligned in a direction within ±

10°

from a perpendicular direction to a surface of the oxide semiconductor layer, and

wherein a thickness of the crystalline region is 2 nm to 10 nm.

9. The semiconductor device according to claim 8, wherein a hydrogen concentration of the oxide semiconductor layer is 5×

10¹⁹/cm³ or less.

10. The semiconductor device according to claim 8, wherein an energy band gap of the oxide semiconductor layer is 3.0 eV to 3.5 eV.

11. The semiconductor device according to claim 8, wherein the oxide semiconductor layer contains indium, gallium and zinc.

12. The semiconductor device according to claim 8, wherein an off-state current of the semiconductor device is 1×

10<sup>−

13</sup> A or less when a drain voltage is +1 V or +10 V, and a gate voltage is set from −

5 V to −

20 V.

13. The semiconductor device according to claim 8, further comprising a gate insulating layer covering the source electrode layer and the drain electrode layer.

14. The semiconductor device according to claim 8, wherein the semiconductor device is one selected from the group consisting of a personal computer, a personal digital assistant, an electronic book, a cellular phone, a digital camera, and a television set.