Continuous time linear equalization for current-mode logic with transformer
First Claim
1. A current mode logic device comprising:
- a first input and a second input for receiving data;
a first transistor comprising a first gate and a first output terminal and a first source terminal, the first gate being electrically coupled to the first input;
a second transistor comprising a second gate and a second output terminal, the second gate being electrically coupled to the second input;
a capacitor module coupled to the first source terminal, the capacitor module comprising a plurality of capacitors;
a first resistor coupled to the first output terminal;
a second resistor coupled to the second output terminal;
a first transformer comprising a first primary winding and a first secondary winding, the first primary winding being electrically coupled to the first resistor and the first output terminal; and
a first equalization module coupled to the first secondary winding, the first equalization module comprising a first digital-to-analog converter (DAC) unit and a first plurality of resistors, the first DAC unit being configured to selectively switching one or more of the first plurality of resistors in response to equalization signals received from an equalization logic.
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Accused Products
Abstract
The present invention is directed to data communication systems and methods. More specifically, embodiments of the present invention provide a CML that uses one or more equalization modules to apply equalization via secondary windings of transformers that are coupled, directly or indirectly, to the CML outputs. The equalization modules comprises a DAC component that generates switching signals based on control signals received from an external equalization module. The equalization module also includes switchable resistors and/or capacitors. The switching signals are used to select switchable resistors and/or capacitors. By switching resistors and/or capacitors at the equalization module, the outputs of the CML are equalized. There are other embodiments as well.
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Citations
20 Claims
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1. A current mode logic device comprising:
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a first input and a second input for receiving data; a first transistor comprising a first gate and a first output terminal and a first source terminal, the first gate being electrically coupled to the first input; a second transistor comprising a second gate and a second output terminal, the second gate being electrically coupled to the second input; a capacitor module coupled to the first source terminal, the capacitor module comprising a plurality of capacitors; a first resistor coupled to the first output terminal; a second resistor coupled to the second output terminal; a first transformer comprising a first primary winding and a first secondary winding, the first primary winding being electrically coupled to the first resistor and the first output terminal; and a first equalization module coupled to the first secondary winding, the first equalization module comprising a first digital-to-analog converter (DAC) unit and a first plurality of resistors, the first DAC unit being configured to selectively switching one or more of the first plurality of resistors in response to equalization signals received from an equalization logic. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A communication system comprising:
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a first communication line and a second communication line; an adaptive equalization module; a current-mode logic (CML) coupled to the first communication line and the second communication line, wherein the CML comprises; a first input and a second input for receiving data, the first input being coupled to the first communication line, the second input being coupled to the second communication line; a first transistor comprising a first gate and a first output terminal and a first source terminal, the first gate being electrically coupled to the first input; a second transistor comprising a second gate and a second output terminal, the second gate being electrically coupled to the second input; a capacitor module coupled to the first source terminal, the capacitor module comprising a plurality of capacitors; a first transformer comprising a first primary winding and a first secondary winding, the first primary winding being electrically coupled to the first output terminal; and a first equalization module coupled to the first secondary winding, the first equalization module comprising a first digital-to-analog converter (DAC) unit and a first plurality of resistors, the first DAC unit being configured to selectively switching one or more of the first plurality of resistors in response to equalization signals received from the adaptive equalization module. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. A current mode logic device comprising:
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a first input and a second input for receiving data; a first transistor comprising a first gate and a first output terminal, the first gate being electrically coupled to the first input; a second transistor comprising a second gate and a second output terminal, the second gate being electrically coupled to the second input; a first resistor coupled to the first output terminal; a second resistor coupled to the second output terminal; a first transformer comprising a first primary winding and a first secondary winding, the first primary winding being electrically coupled to the first resistor and the first output terminal; and a first equalization module coupled to the first secondary winding, the first equalization module comprising a first digital-to-analog converter (DAC) unit and a first plurality of capacitors, the first DAC unit being configured to selectively switching one or more of the first plurality of capacitors in response to equalization signals received from an equalization logic. - View Dependent Claims (17, 18, 19, 20)
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Specification