Determination and reduction of parasitic capacitance variation due to display noise
First Claim
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1. A method for reducing an overall parasitic capacitance between a display and a capacitive touch-sensing panel, the method comprising:
- generating an admittance model of a plurality of parasitic capacitances between conductive lines that form a plurality of pixels in the display;
varying at least one of the plurality of parasitic capacitances in the admittance model to an adjusted capacitance level;
determining if the adjusted capacitance level reduces the overall parasitic capacitance between the display and the capacitive touch-sensing panel in the admittance model; and
modifying at least one of the capacitive touch-sensing panel and the display such that the at least one parasitic capacitance in the display is adjusted to the adjusted capacitance level based on the admittance model.
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Abstract
Embodiments described herein generally take the form of methods and systems for identifying and/or reducing a parasitic capacitance variation in a capacitive integrated touch-sensing module that may arise from proximity to a nearby electronic display.
16 Citations
17 Claims
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1. A method for reducing an overall parasitic capacitance between a display and a capacitive touch-sensing panel, the method comprising:
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generating an admittance model of a plurality of parasitic capacitances between conductive lines that form a plurality of pixels in the display; varying at least one of the plurality of parasitic capacitances in the admittance model to an adjusted capacitance level; determining if the adjusted capacitance level reduces the overall parasitic capacitance between the display and the capacitive touch-sensing panel in the admittance model; and modifying at least one of the capacitive touch-sensing panel and the display such that the at least one parasitic capacitance in the display is adjusted to the adjusted capacitance level based on the admittance model. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for reducing a cross-capacitance between a display and a touch-sensitive component, the method comprising:
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generating an admittance model that includes a plurality of parasitic capacitance values, each of which corresponds to a given parasitic capacitance in the display; in the admittance model, adjusting at least one of the plurality of parasitic capacitance values; determining if adjusting the parasitic capacitance value decreases an overall parasitic capacitance value in the admittance model that corresponds to the cross-capacitance between the display and the touch-sensitive component; and adjusting the given parasitic capacitance in the display to reduce the cross-capacitance between the display and the touch-sensitive component. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A method for reducing a parasitic capacitance between a display and a capacitive touch-sensing panel, the method comprising:
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generating an admittance model of a plurality of parasitic capacitances between a plurality of pixels in the display; representing one or more of the plurality of parasitic capacitances as one or more phasors; varying one or more of the plurality of parasitic capacitances in the admittance model; determining if the variance of the one or more of the plurality of parasitic capacitances reduces an overall parasitic capacitance between the display and the capacitive touch-sensing panel, wherein the overall parasitic capacitance is an expression of a display to touch sensing module cross-capacitance; and in response to determining that the variance reduces the overall parasitic capacitance, implementing the variance in at least one of the capacitive touch-sensing panel and the display.
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Specification