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Achieving power supply and heat dissipation (cooling) in three-dimensional multilayer package

  • US 9,330,213 B2
  • Filed: 03/26/2013
  • Issued: 05/03/2016
  • Est. Priority Date: 05/21/2012
  • Status: Active Grant
First Claim
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1. An apparatus that performs power supply and heat dissipation for a stacked multiple-chip structure from an upper surface side of said stacked multiple-chip structure, comprising:

  • an organic substrate provided on a lower surface side of said stacked multiple-chip structure;

    a substrate that uses silicon (Si) where a wiring layer, with a thickness, is formed on a bottom surface side facing said upper surface side of said stacked multiple-chip structure;

    a heat dissipater located on said substrate that uses Si that dissipates heat directly above the upper surface side of said substrate that uses Si;

    said organic substrate and said wiring layer formed on said substrate that uses Si are electrically connected in a periphery of said apparatus; and

    said stacked multiple-chip structure, on said upper surface side, is adapted to receive power through said wiring layer.

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