Methods, systems, and articles of manufacture for implementing electronic circuit designs with electro-migration awareness
First Claim
1. A computer implemented method for implementing an electronic circuit design with electro-migration awareness, comprising:
- using at least one processor that is programmed for performing a process comprising;
implementing an interconnect by identifying, determining, or updating physical data of the interconnect of a partial physical design that represents the electronic circuit design;
characterizing an electrical parasitic that is associated with the physical data of the interconnect;
providing electro-migration information for the interconnect, while the interconnect is being implemented in the partial physical design, to a physical implementation tool to implement the interconnect in the partial physical design by at least characterizing an electrical characteristic associated with the electrical parasitic, whereinthe electronic circuit design includes a layout that is represented by the partial physical design, and at least one circuit component is absent from a net including the interconnect in the partial physical design representing the layout, wherein the layout does not pass a layout-versus-schematic check with a corresponding schematic design due to absence of the at least one circuit component from the layout; and
implementing, at an electro-migration aware design automation module stored at least partially in memory and functioning in conjunction with at least the at least one processor of a computing system, the net including the interconnect at least by applying an adjustment to the interconnect based in part or in whole upon the electro-migration information for the interconnect while saving one or more computing resources when the electro-migration information is determined to violate one or more electro-migration related constraints.
1 Assignment
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Accused Products
Abstract
Disclosed are methods, systems, and articles of manufacture for implementing electronic circuit designs with electro-migration awareness. Some embodiments perform schematic level simulation(s) to determine electrical characteristics, identifies physical parasitics of a layout component, determines the electrical or physical characteristics associated to electro-migration analysis on the component, and determines whether the component meets EM related constraint(s) while implementing the physical design of the electronic circuit in some embodiments. Some embodiments further determine adjustment(s) to the component or related data where the EM related constraints are not met and/or and present the adjustment(s) in the form of hints. Various data and information, such as currents in various forms or voltages, are passed between various schematic level tools and physical level tools.
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Citations
51 Claims
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1. A computer implemented method for implementing an electronic circuit design with electro-migration awareness, comprising:
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using at least one processor that is programmed for performing a process comprising; implementing an interconnect by identifying, determining, or updating physical data of the interconnect of a partial physical design that represents the electronic circuit design; characterizing an electrical parasitic that is associated with the physical data of the interconnect; providing electro-migration information for the interconnect, while the interconnect is being implemented in the partial physical design, to a physical implementation tool to implement the interconnect in the partial physical design by at least characterizing an electrical characteristic associated with the electrical parasitic, wherein the electronic circuit design includes a layout that is represented by the partial physical design, and at least one circuit component is absent from a net including the interconnect in the partial physical design representing the layout, wherein the layout does not pass a layout-versus-schematic check with a corresponding schematic design due to absence of the at least one circuit component from the layout; and implementing, at an electro-migration aware design automation module stored at least partially in memory and functioning in conjunction with at least the at least one processor of a computing system, the net including the interconnect at least by applying an adjustment to the interconnect based in part or in whole upon the electro-migration information for the interconnect while saving one or more computing resources when the electro-migration information is determined to violate one or more electro-migration related constraints. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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24. A system for implementing an electronic circuit design with electro-migration awareness, comprising:
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at least one processor that is to; implement an interconnect by identify, determine, or update physical data of the interconnect of a partial physical design that represents the electronic circuit design; characterize an electrical parasitic that is associated with the physical data of the interconnect; provide electro-migration information for the interconnect, while the interconnect is being implemented in the partial physical design, to a physical implementation tool to implement the interconnect in the partial physical design by at least characterizing an electrical characteristic that is associated with the electrical parasitic, wherein the electronic circuit design includes a layout that is represented by the partial physical design, and at least one circuit component is absent from a net including the interconnect in the partial physical design representing the layout, wherein the layout does not pass a layout-versus-schematic check with a corresponding schematic design due to absence of the at least one circuit component from the layout; and implement, at an electro-migration aware design automation module stored at least partially in memory and functioning in conjunction with at least the at least one processor of a computing system, the net including the interconnect at least by applying an adjustment to the interconnect based in part or in whole upon the electro-migration information for the interconnect while saving one or more computing resources when the electro-migration information is determined to violate one or more electro-migration related constraints. - View Dependent Claims (25, 26, 27, 28)
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29. An article of manufacture comprising a non-transitory computer readable storage medium having a sequence of instructions stored thereupon which, when executed by a processor, causes the processor to perform a process for implementing an electronic circuit design with electro-migration awareness, the process comprising:
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using at least one processor that is programmed for performing the process that comprises; identifying, determining, or updating physical data of an interconnect of a partial physical design of the electronic circuit design; characterizing an electrical parasitic that is associated with the physical data of the interconnect; providing electro-migration information for the interconnect, while the interconnect is being implemented, to a physical implementation tool to implement the interconnect in the partial physical design by at least characterizing an electrical characteristic that is associated with the electrical parasitic, wherein the partial physical design represents a layout of the electronic circuit design, and at least one circuit component is absent from a net including the interconnect in the partial physical design representing the layout, wherein the layout does not pass a layout-versus-schematic check with a corresponding schematic design due to absence of the at least one circuit component from the layout; and implementing, at an electro-migration aware design automation module stored at least partially in memory and functioning in conjunction with at least the at least one processor of a computing system, the net including the interconnect at least by applying an adjustment to the interconnect based in part or in whole upon the electro-migration information for the interconnect while saving one or more computing resources when the electro-migration information is determined to violate one or more electro-migration related constraints. - View Dependent Claims (30, 31, 32, 33)
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34. A computer implemented method for implementing an electronic circuit design with electro-migration awareness, comprising:
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using at least one processor that is programmed for performing a process comprising; identifying, determining, or updating physical data of a interconnect of a partial physical design of the electronic circuit design; characterizing an electrical parasitic that is associated with the physical data of the interconnect providing electro-migration information, while the interconnect is being implemented in the partial physical design, to a physical design implementation tool by at least characterizing an electrical characteristic that is associated with the electrical parasitic, wherein the partial physical design represents a layout of the electronic circuit design, and at least one circuit component is absent from a net including the interconnect in the partial physical design representing the layout, wherein the layout does not pass a layout-versus-schematic check with a corresponding schematic design due to absence of the at least one circuit component from the layout; and implementing, at an electro-migration aware design automation module stored at least partially in memory and functioning in conjunction with at least the at least one processor of a computing system, the net including the interconnect at least by applying an adjustment to the interconnect based in part or in whole upon the electro-migration information for the interconnect while saving one or more computing resources when the electro-migration information is determined to violate one or more electro-migration related constraints. - View Dependent Claims (35, 36, 37, 38, 39)
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40. A system for implementing an electronic circuit design with electro-migration awareness, comprising:
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at least one processor that is to; identify, determine, or update physical data of a interconnect of a partial physical design of the electronic circuit design; characterize an electrical parasitic that is associated with the physical data of the interconnect; provide electro-migration information, while the interconnect is being implemented in the partial physical design, to a the physical design implementation tool by at least characterizing an electrical characteristic that is associated with the electrical parasitic, wherein the partial physical design represents a layout of the electronic circuit design, and at least one circuit component circuit component is absent from a net including the interconnect in the partial physical design representing the layout, wherein the layout does not pass a layout-versus-schematic check with a corresponding schematic design due to absence of the at least one circuit component from the layout; and implement, at an electro-migration aware design automation module stored at least partially in memory and functioning in conjunction with at least the at least one processor of a computing system, the net including the interconnect at least by applying an adjustment to the interconnect based in part or in whole upon the electro-migration information for the interconnect while saving one or more computing resources when the electro-migration information is determined to violate one or more electro-migration related constraints. - View Dependent Claims (41, 42, 43, 44, 45)
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46. An article of manufacture comprising a non-transitory computer readable medium having stored thereupon a sequence of instructions which, when executed by at least one processor, causes the processor to execute a method for implementing an electronic circuit design with electro-migration awareness, the method comprising:
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using at least one processor that is programmed for performing a process comprising; identifying, determining, or updating physical data of a interconnect of a partial physical design of the electronic circuit design; characterizing an electrical parasitic that is associated with the physical data of the interconnect; providing electro-migration information, while the interconnect is being implemented in the partial physical design, to a the physical design implementation tool by at least characterizing an electrical characteristic that is associated with the electrical parasitic, wherein the partial physical design represents a layout of the electronic circuit design, and at least one circuit component circuit component is absent from a net including the interconnect in the partial physical design representing the layout, wherein the layout does not pass a layout-versus-schematic check with a corresponding schematic design due to absence of the at least one circuit component from the layout; and implementing, at an electro-migration aware design automation module stored at least partially in memory and functioning in conjunction with at least the at least one processor of a computing system, the net including the interconnect at least by applying an adjustment to the interconnect based in part or in whole upon the electro-migration information for the interconnect while saving one or more computing resources when the electro-migration information is determined to violate one or more electro-migration related constraints. - View Dependent Claims (47, 48, 49, 50, 51)
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Specification