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DRAM-based anti-fuse cells

  • US 9,330,794 B1
  • Filed: 03/04/2015
  • Issued: 05/03/2016
  • Est. Priority Date: 03/04/2015
  • Status: Active Grant
First Claim
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1. An apparatus, comprising:

  • a plurality of word lines;

    a plurality of bit lines;

    a cell plate;

    a plurality of cells, wherein each of the plurality of cells includes a switch and a capacitor coupled in series between an associated one of the bit lines and the cell plate, and wherein the switch is controlled by an associated one of the word lines; and

    a control circuit configured to provide the cell plate with a first voltage and further configured to change the cell plate from the first voltage to a second voltage before one of the word lines is activated.

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