Array substrate, manufacturing method thereof and display device
First Claim
1. An array substrate, comprising:
- a gate, a gate insulation layer, an active layer, a source and a drain, which are disposed on a substrate; and
a pixel electrode located above the drain and lapped with the drain, and a part of the pixel electrode lapped with the drain is a lapping part of the pixel electrode, wherein the array substrate further comprises;
a first insulation layer located below the pixel electrode and in contact with the drain, wherein the first insulation layer extends along the edge of the lapping part towards a direction away from the lapping part, a part of the drain in contact with the lapping part is exposed from the first insulation layer, and the plane where the upper surface of the first insulation layer is located is lower than the plane where the upper surface of the drain is located.
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Abstract
The invention discloses an array substrate, a manufacturing method thereof and a display device. The array substrate includes a gate, an active layer, a source and a drain on a substrate, and a pixel electrode located above the drain and lapped with the drain, and a part of the pixel electrode lapped with the drain is a lapping part of the pixel electrode; the array substrate further includes a first insulation layer located below the pixel electrode and in contact with the drain, the first insulation layer extends along the edge of the lapping part towards a direction away from the lapping part, part of the drain to be in contact with the lapping part is exposed from the first insulation layer, and the plane where the upper surface of the first insulation layer is located is lower than the plane where the upper surface of the drain is located.
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Citations
10 Claims
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1. An array substrate, comprising:
- a gate, a gate insulation layer, an active layer, a source and a drain, which are disposed on a substrate; and
a pixel electrode located above the drain and lapped with the drain, and a part of the pixel electrode lapped with the drain is a lapping part of the pixel electrode, wherein the array substrate further comprises;a first insulation layer located below the pixel electrode and in contact with the drain, wherein the first insulation layer extends along the edge of the lapping part towards a direction away from the lapping part, a part of the drain in contact with the lapping part is exposed from the first insulation layer, and the plane where the upper surface of the first insulation layer is located is lower than the plane where the upper surface of the drain is located. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
- a gate, a gate insulation layer, an active layer, a source and a drain, which are disposed on a substrate; and
Specification