Dynamically limiting bios post for effective power management

• US 9,336,106 B2
• Filed: 04/17/2014
• Issued: 05/10/2016
• Est. Priority Date: 04/17/2014
• Status: Active Grant

• Current Assignee: Cisco Technology, Inc. (Cisco Systems, Inc.)
• Original Assignee: Cisco Technology, Inc. (Cisco Systems, Inc.)
• Inventors: Phuong, Scott, Wang, Tao, Sidhartha, Kumar
• Primary Examiner(s): YANCHUS III, PAUL B
• Application Number:
  US14/255,208
• Publication Number:
  US 20150301914A1
• Time in Patent Office: 754 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: G06F 1/3293 by switching to a less power-consuming processor, e.g. sub-CPU
• CPC Class Codes: G06F 11/2284 by power-on test, e.g. power-on self test [POST]
• CPC Class Codes: G06F 9/5094 where the allocation takes into account power or heat criteria power management in computers in general G06F1/3203; thermal management in computers in general G06F1/206
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Presented herein are methods for budgeting power during a power-on self-test (POST) sequence. A determination is made for one or more stages of a power-on-self-test sequence of a system, whether a power profile of a particular stage is greater than a power budget for that stage. The power profile specifies a maximum power consumption as determined by the characteristics of the system and the power budget specifies a power consumption currently allocated to the system. When the power profile is greater than the power budget for that stage, power consumption of the system during the power-on-self-test sequence is limited such that the system does not consume more power than specified by the power budget.

Claims

1. A computer implemented method comprising:

determining for one or more stages of a power-on-self-test sequence of a system, whether a power profile of a particular stage is greater than a power budget for that stage, wherein the power profile specifies a maximum power consumption as determined by the characteristics of the system and the power budget specifies a power consumption currently allocated to the system; and

when the power profile is greater than the power budget for that stage, limiting power consumption of the system during the one or more stages of the power-on-self-test sequence such that the system does not consume more power than specified by the power budget.

2. The method of claim 1, wherein limiting power consumption further comprises utilizing stored performance state information, the performance state information containing power consumption data for each state of a plurality of performance states, and selecting a performance state having a power consumption that is equal to or less than the power budget for that stage.

3. The method of claim 2, further comprising selecting a performance state associated with a lower operating frequency of a central processing unit than an operating frequency currently being utilized by the central processing unit in order to reduce power consumption.

4. The method of claim 2, further comprising determining power characteristics for each state specified in the performance state information occurring during operating system execution, such that the power characteristics correspond to a maximum power consumption for each state.

5. The method of claim 4, further comprising utilizing normalized performance state information, as determined during operating system execution, to reflect a percentage of maximum power consumed for each state;

and

mapping, using a normalized performance state table, performance state characteristics of power consumption during normal system operation to a corresponding performance state for the power-on-self-test sequence.

6. The method of claim 1, wherein limiting comprises limiting power consumption such that the limited power consumption is greater than a minimum power consumption needed to complete the power-on-self-test sequence.

7. The method of claim 1, wherein limiting comprises limiting power consumption in a manner that minimizes impact to server performance.

8. An apparatus comprising:

memory configured to store a power profile and a power budget; and

a processor coupled to the memory, and configured to;

determine for one or more stages of a power-on-self-test sequence of a system, whether a power profile of a particular stage is greater than a power budget for that stage, wherein the power profile specifies a maximum power consumption as determined by the characteristics of the system and the power budget specifies a power consumption currently allocated to the system; and

limit, when the power profile is greater than the power budget for that stage, power consumption of the system during the one or more stages of the power-on-self-test sequence such that the system does not consume more power than specified by the power budget.

9. The apparatus of claim 8, wherein the processor is configured to limit power consumption by utilizing performance state information stored as part of the power profile, the performance state information containing power consumption data for each state of a plurality of performance states, and selecting a performance state having a power consumption that is equal to or less than the power budget for that stage.

10. The apparatus of claim 9, wherein the processor is configured to select a performance state associated with a lower operating frequency of a central processing unit than an operating frequency currently being utilized by the central processing unit in order to reduce power consumption.

11. The apparatus of claim 9, wherein the processor is configured to determine power characteristics for each state specified in the performance state information occurring during operating system execution, such that the power characteristics correspond to a maximum power consumption for each state.

12. The apparatus of claim 11, wherein the processor is configured to:

utilize normalized performance state information, as determined during operating system execution, to reflect a percentage of maximum power consumed for each state; and

map, using a normalized performance state table, performance state characteristics of power consumption during normal system operation to a corresponding performance state for the power-on-self-test sequence.

13. The apparatus of claim 8, wherein the processor is configured to limit power consumption such that the limited power consumption is greater than a minimum power consumption needed to complete the power-on-self-test sequence.

14. The apparatus of claim 8, wherein the processor is configured to limit power consumption in a manner that minimizes impact to server performance.

15. One or more computer-readable storage media encoded with software comprising computer executable instructions and when the software is executed operable to:

determine for one or more stages of a power-on-self-test sequence of a system, whether a power profile of a particular stage is greater than a power budget for that stage, wherein the power profile specifies a maximum power consumption as determined by the characteristics of the system and the power budget specifies a power consumption currently allocated to the system; and

limit, when the power profile is greater than the power budget for that stage, power consumption of the system during the one or more stages of the power-on-self-test sequence such that the system does not consume more power than specified by the power budget.

16. The computer-readable storage media of claim 15, further comprising instructions operable to limit power consumption by utilizing performance state information stored as part of the power profile, the performance state information containing power consumption data for each state of a plurality of performance states, and selecting a performance state having a power consumption that is equal to or less than the power budget for that stage.

17. The computer-readable storage media of claim 16, further comprising instructions operable to select a performance state associated with a lower operating frequency of a central processing unit than an operating frequency currently being utilized by the central processing unit in order to reduce power consumption.

18. The computer-readable storage media of claim 16, further comprising instructions operable to determine power characteristics for each state specified in the performance state information occurring during operating system execution, such that the power characteristics correspond to a maximum power consumption for each state.

19. The computer-readable storage media of claim 18, further comprising instructions operable to:

utilize normalized performance state information, as determined during operating system execution, to reflect a percentage of maximum power consumed for each state; and

map, using a normalized performance state table, performance state characteristics of power consumption during normal system operation to a corresponding performance state for the power-on-self-test sequence.

20. The computer-readable storage media of claim 15, further comprising instructions operable to limit power consumption in a manner that minimizes impact to server performance.