Wireless power receiver circuitry

• US 9,337,664 B2
• Filed: 09/30/2011
• Issued: 05/10/2016
• Est. Priority Date: 12/16/2010
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Von Novak, William H., Irish, Linda S.
• Primary Examiner(s): Berhane, Adolf
• Assistant Examiner(s): Torres-Rivera, Alex
• Application Number:
  US13/250,783
• Publication Number:
  US 20120155136A1
• Time in Patent Office: 1,684 Days
• Field of Search: 323/222, 323/223, 323/271, 323/282, 323/284, 323/285, 323/299, 323/300, 323/303, 320/137, 320/139, 320/140, 320/141, 320/142, 320/143, 320/145, 320/157, 320/162, 320/108, 307/104
• US Class Current: 1/1
• CPC Class Codes: H02J 50/12 of the resonant type
• CPC Class Codes: H02J 50/20 using microwaves or radio frequency waves
• CPC Class Codes: H02J 50/80 involving the exchange of data, concerning supply or distribution of electric power, between transmitting devices and receiving devices
• CPC Class Codes: H02J 7/00712 the cycle being controlled or terminated in response to electric parameters
• CPC Class Codes: H02M 3/1582 Buck-boost converters H02M3/1584 takes precedence

Abstract

Exemplary embodiments are directed to wireless power receivers. A device may include a power converter configured to receive an input voltage. The device may further include circuitry configured to limit a pulse width modulation duty cycle of the power converter to prevent the input voltage from dropping below a threshold voltage.

Claims

1. A device for receiving wireless charging power from a source comprising:

a receive antenna configured to wirelessly receive charging power from the source;

a power converter coupled to the receive antenna and configured to receive an input voltage derived from the charging power and provide at least a portion of the charging power to a load, the power converter further configured to, in response to detecting an increase in the load, reduce an input impedance of the power converter to maintain an output voltage above an output threshold voltage level; and

circuitry operationally coupled to the power converter, the circuitry comprising a first transistor coupled to each of an end of a first diode and a ground voltage and a second transistor coupled to each of a feedback voltage that is fed into the power converter via a first resistor and the ground voltage, the circuitry configured to prevent a pulse width modulation duty cycle from increasing above a fixed maximum pulse width modulation duty cycle that prevents the input impedance from dropping below a minimum impedance value.

2. The device of claim 1, the circuitry further configured to limit an amount of power of the output voltage to prevent the input voltage from dropping below the input threshold voltage level.

3. The device of claim 1, the circuitry further comprising:

a second resistor coupled between an input for receiving the input voltage and the first diode, wherein the first diode comprises a zener diode.

4. The device of claim 3, the power converter configured to receive a variable current at the input thereof dependent on the input voltage.

5. The device of claim 1,

the first diode having a first end coupled to an input for receiving the input voltage.

6. The device of claim 5, wherein a current through the first diode and a current through the first resistor is dependent on the input voltage, and wherein the first and second transistors form a current mirror.

7. The device of claim 1, the power converter comprising the circuitry.

8. The device of claim 7, the circuitry comprising:

a second diode having a first end coupled to an output of an error amplifier and an input of a pulse width modulation generator; and

a reference voltage coupled between a second end of the second diode and a ground voltage.

9. The device of claim 1, the power converter comprising a DC-to-DC converter.

10. The device of claim 1, the circuitry further comprising

a second resistor coupled to an input for receiving the input voltage and the first diode.

11. The device of claim 1, wherein the first resistor is coupled between the second transistor and the feedback voltage that is fed into the power converter, and wherein the first diode is further coupled to an input for receiving the input voltage.

12. The device of claim 11, a current through the first transistor and a current through the second transistor being dependent on the input voltage.

13. The device of claim 1, the circuitry integrated within the power converter and comprising:

a second diode coupled between an output of an error amplifier and an input of a pulse width modulation generator; and

a reference voltage coupled between the second diode and a ground voltage.

14. The device of claim 1, wherein the power converter is configured with a negative impedance that maximizes receiving the charging power.

15. The device of claim 1, wherein the power converter is configured with a negative impedance that substantially equals a positive impedance of the source.

16. The device of claim 1, wherein the receive antenna is further configured to charge a plurality of receiver devices.

17. The device of claim 1, wherein the input impedance is based at least in part on a number of a plurality of receiver devices, a distance of the receive antenna from the source, and/or size of the receive antenna.

18. The device of claim 1, wherein the feedback voltage is based on the output voltage.

19. A method for receiving wireless charging power from a source comprising:

wirelessly receiving charging power at a receive antenna from the source;

receiving an input voltage derived from the charging power at a power converter coupled to the receive antenna;

providing at least a portion of the charging power to a load;

in response to detecting an increase in the load, reducing an input impedance of the power converter;

maintaining an output voltage above an output threshold voltage level in response to reducing the input impedance; and

preventing, by a circuitry operationally coupled to the power converter, a pulse width modulation duty cycle from increasing above a fixed maximum pulse width modulation duty cycle that prevents the input impedance from dropping below a minimum impedance value, the circuitry comprising a first transistor coupled to each of an end of a diode and a ground voltage and a second transistor coupled to each of a feedback voltage that is fed into the power converter via a resistor and the ground voltage.

20. The method of claim 19, the receiving the input voltage comprising receiving the input voltage from a rectifier.

21. The method of claim 19, the preventing the pulse width modulation duty cycle comprising limiting a current conveyed to the power converter.

22. The method of claim 19, the preventing the pulse width modulation duty cycle comprising increasing a voltage at the feedback voltage that is fed into the power converter.

23. The method of claim 19, the preventing the pulse width modulation duty cycle comprising limiting a voltage conveyed to a pulse width modulation generator.

24. The method of claim 19, the receiving the input voltage comprising receiving the input voltage conveyed from a rectifier at a DC-to-DC converter.

25. A device for receiving wireless charging power from a source comprising:

means for wirelessly receiving charging power from the source;

means for receiving an input voltage derived from the charging power, the means for receiving the input voltage coupled to the means for wirelessly receiving charging power;

means for providing at least a portion of the charging power to a load;

means for reducing an input impedance of the receiving means in response to detecting an increase in the load;

means for maintaining an output voltage above an output threshold voltage level in response to reducing the input impedance; and

means for preventing a pulse width modulation duty cycle from increasing above a fixed maximum pulse width modulation duty cycle that prevents the input impedance from dropping below a minimum impedance value, the preventing means comprising a first transistor coupled to each of an end of a diode and a ground voltage and a second transistor coupled to each of a feedback voltage that is fed into the reducing means via a resistor and the ground voltage.