Function callback mechanism between a central processing unit (CPU) and an auxiliary processor

• US 9,342,384 B1
• Filed: 12/18/2014
• Issued: 05/17/2016
• Est. Priority Date: 12/18/2014
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Lewis, Brian T., Barik, Rajkishore, Shpeisman, Tatiana
• Primary Examiner(s): Ho, Andy
• Application Number:
  US14/574,545
• Time in Patent Office: 516 Days
• Field of Search: 719/312, 719/314
• US Class Current: 1/1
• CPC Class Codes: G06F 2209/548 Queue
• CPC Class Codes: G06F 9/544 Buffers; Shared memory; Pipes
• CPC Class Codes: G06F 9/547 Remote procedure calls [RPC]; Web services
• CPC Class Codes: G06T 1/20 Processor architectures; Processor configuration, e.g. pipelining
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Generally, this disclosure provides systems, devices, methods and computer readable media for implementing function callback requests between a first processor (e.g., a GPU) and a second processor (e.g., a CPU). The system may include a shared virtual memory (SVM) coupled to the first and second processors, the SVM configured to store at least one double-ended queue (Deque). An execution unit (EU) of the first processor may be associated with a first of the Deques and configured to push the callback requests to that first Deque. A request handler thread executing on the second processor may be configured to: pop one of the callback requests from the first Deque; execute a function specified by the popped callback request; and generate a completion signal to the EU in response to completion of the function.

Claims

1. A system for implementing function callback requests between a first processor and a second processor, said system comprising:

a shared virtual memory (SVM) coupled to said first and second processors, said SVM to store at least one double-ended queue (Deque);

an execution unit (EU) of said first processor, said EU associated with a first of said Deques, to push said callback requests to said first Deque; and

a request handler thread executing on said second processor to;

pop one of said callback requests from said first Deque;

execute a function specified by said popped callback request; and

generate a completion signal to said EU in response to completion of said function.

2. The system of claim 1, wherein said callback requests comprise:

a function pointer to specify said function to be executed by said second processor; and

an argument pointer to specify a location in said SVM for data to be provided to said executed function and for results generated by said executed function to be provided to said EU.

3. The system of claim 1, wherein said request handler thread is further to pop one of said callback requests from a second Deque, said second Deque associated with a second EU, in response to detecting that said first Deque is empty.

4. The system of claim 1, wherein said Deques are pinned in said SVM to prevent page faults in response to access attempts by said EUs and said request handlers.

5. The system of claim 1, wherein said completion signal is to set a completion flag in said SVM and said EU is further to poll said completion flag.

6. The system of claim 1, wherein said completion signal is to trigger a continuation kernel on said EU, said continuation kernel to restore previously saved stack variables.

7. The system of claim 1, wherein said request handler thread is further to sleep in response to failure to pop one of said callback requests from any of said Deques.

8. The system of claim 7, wherein said sleep comprises execution of a Monitor/Mwait instruction.

9. The system of claim 1, wherein said first processor is a Graphics Processor Unit (GPU) and said second processor is a general purpose Central Processor Unit (CPU).

10. A method for function callback requests between a first processor and a second processor, said method comprising:

pushing said callback requests, by an execution unit (EU) of said first processor, to a first double-ended queue (Deque), said Deque stored in a shared virtual memory (SVM) coupled to said first and second processors;

popping one of said callback requests from said first Deque, by a request handler thread executing on said second processor;

executing, by said request handler thread, a function specified by said popped callback request; and

generating, by said request handler thread, a completion signal to said EU in response to completion of said function.

11. The method of claim 10, wherein said callback requests comprise:

a function pointer to specify said function to be executed by said second processor; and

an argument pointer to specify a location in said SVM for data to be provided to said executed function and for results generated by said executed function to be provided to said EU.

12. The method of claim 10, further comprising popping, by said request handler thread, one of said callback requests from a second Deque, said second Deque associated with a second EU, in response to detecting that said first Deque is empty.

13. The method of claim 10, further comprising pinning said Deques in said SVM to prevent page faults in response to access attempts by said EUs and said request handlers.

14. The method of claim 10, wherein generating said completion signal further comprises setting a completion flag in said SVM for polling by said EU.

15. The method of claim 10, wherein generating said completion signal further comprises triggering a continuation kernel on said EU, said continuation kernel to restore previously saved stack variables.

16. The method of claim 10, further comprising sleeping, by said request handler thread, in response to a failure to pop one of said callback requests from any of said Deques.

17. The method of claim 16, wherein said sleeping further comprises execution of a Monitor/Mwait instruction.

18. At least one computer-readable storage medium having instructions stored thereon which when executed by a processor result in the following operations for function callback requests between a first processor and a second processor, said operations comprising:

pushing said callback requests, by an execution unit (EU) of said first processor, to a first double-ended queue (Deque), said Deque stored in a shared virtual memory (SVM) coupled to said first and second processors;

popping one of said callback requests from said first Deque, by a request handler thread executing on said second processor;

executing, by said request handler thread, a function specified by said popped callback request; and

generating, by said request handler thread, a completion signal to said EU in response to completion of said function.

19. The computer-readable storage medium of claim 18, wherein said callback requests comprise:

a function pointer to specify said function to be executed by said second processor; and

an argument pointer to specify a location in said SVM for data to be provided to said executed function and for results generated by said executed function to be provided to said EU.

20. The computer-readable storage medium of claim 18, further comprising popping, by said request handler thread, one of said callback requests from a second Deque, said second Deque associated with a second EU, in response to detecting that said first Deque is empty.

21. The computer-readable storage medium of claim 18, further comprising pinning said Deques in said SVM to prevent page faults in response to access attempts by said EUs and said request handlers.

22. The computer-readable storage medium of claim 18, wherein generating said completion signal further comprises setting a completion flag in said SVM for polling by said EU.

23. The computer-readable storage medium of claim 18, wherein generating said completion signal further comprises triggering a continuation kernel on said EU, said continuation kernel to restore previously saved stack variables.

24. The computer-readable storage medium of claim 18, further comprising sleeping, by said request handler thread, in response to a failure to pop one of said callback requests from any of said Deques.

25. The computer-readable storage medium of claim 24, wherein said sleeping further comprises execution of a Monitor/Mwait instruction.