Stackable semiconductor package and manufacturing method thereof
First Claim
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1. A manufacturing method, comprising:
- providing a carrier;
disposing a semiconductor device over the carrier such that an active surface of the semiconductor device faces the carrier, wherein the semiconductor device includes a pad adjacent to the active surface;
forming a package body over the carrier and the semiconductor device, wherein the package body includes a first package surface and a second package surface opposite to the first package surface, and the first package surface faces the carrier;
forming a through-hole in the package body, wherein the through-hole extends between the first package surface and the second package surface;
separating the carrier from the package body;
forming a dielectric layer adjacent to the first package surface, wherein the dielectric layer exposes the pad and the through-hole;
forming a conductive via in the through-hole, wherein the conductive via includes a first end, adjacent to the first package surface, and a second end, adjacent to the second package surface;
forming a patterned conductive layer adjacent to the dielectric layer, wherein the patterned conductive layer is electrically connected to at least one of the pad and the first end of the conductive via; and
forming a stud bump adjacent to the second end of the conductive via.
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Abstract
A semiconductor package includes a set of stud bumps, which can be formed by wire bonding technology and can be bonded or joined to a semiconductor element to form a stacked package assembly. Since the process of bonding the semiconductor element to the stud bumps can be carried out without reflow, an undesirable deformation resulting from high temperatures can be controlled or reduced.
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Citations
20 Claims
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1. A manufacturing method, comprising:
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providing a carrier; disposing a semiconductor device over the carrier such that an active surface of the semiconductor device faces the carrier, wherein the semiconductor device includes a pad adjacent to the active surface; forming a package body over the carrier and the semiconductor device, wherein the package body includes a first package surface and a second package surface opposite to the first package surface, and the first package surface faces the carrier; forming a through-hole in the package body, wherein the through-hole extends between the first package surface and the second package surface; separating the carrier from the package body; forming a dielectric layer adjacent to the first package surface, wherein the dielectric layer exposes the pad and the through-hole; forming a conductive via in the through-hole, wherein the conductive via includes a first end, adjacent to the first package surface, and a second end, adjacent to the second package surface; forming a patterned conductive layer adjacent to the dielectric layer, wherein the patterned conductive layer is electrically connected to at least one of the pad and the first end of the conductive via; and forming a stud bump adjacent to the second end of the conductive via. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A manufacturing method, comprising:
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providing a package structure including; providing a package body comprising a semiconductor device including an active surface and a pad adjacent to the active surface, wherein the pad of the semiconductor device is exposed adjacent to a lower surface of the package body, creating a through hole extending between the lower surface of the package body and an upper surface of the package body, filling the through hole with a conductive via, and forming an upper patterned conductive layer adjacent to the upper surface of the package body and electrically connected to an upper end of the conductive via; and forming a stud bump over the upper patterned conductive layer, wherein the stud bump is laterally displaced from the conductive via. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A manufacturing method, comprising:
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providing a package structure including; a semiconductor device including a pad, a package body encapsulating the semiconductor device with the pad exposed adjacent to a lower surface of the package body, a conductive structure at least partially extending between the lower surface of the package body and an upper surface of the package body, an upper patterned conductive layer extending from an upper end of the conductive structure and along the upper surface of the package body, and a lower patterned conductive layer extending from a lower end of the conductive structure and along the lower surface of the package body; and forming a stacking element over the upper patterned conductive layer, wherein the stacking element includes a base portion and a protruded portion disposed over the base portion, and the stacking element is laterally displaced from the conductive structure. - View Dependent Claims (19, 20)
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Specification