Display substrate and method of manufacturing the same, and display device
First Claim
1. A display substrate, including:
- a substrate;
gate lines and data lines arranged in a crisscrossed pattern on the substrate;
pixel units defined by the gate lines and the data lines, each of which includes a thin film transistor and a pixel electrode;
a color filter layer disposed on the substrate and including at least one color region, a vertical projection of the pixel electrode within one of the pixel units on the substrate being within a vertical projection of one color region of the color filter layer on the substrate; and
a black matrix disposed over the gate lines, the data lines and the thin film transistors, a vertical projection of all of the gate lines, the data lines and the thin film transistors on the substrate being within a vertical projection of the black matrix on the substrate;
wherein the thin film transistor comprises;
an active layer disposed on the substrate;
a gate insulation layer disposed on the active layer;
a gate disposed on the gate insulation layer;
a source/drain insulation layer disposed on the gate, a first via corresponding to a source and a second via corresponding to a drain being provided in the gate insulation layer and the source/drain insulation layer; and
the source and the drain disposed on the source/drain insulation layer, the source being connected with the active layer through the first via, and the drain being connected with the active layer through the second via;
and wherein;
the color filter layer is disposed over the source and the drain;
a passivation layer is further provided on the color filter layer on the substrate, and a third via corresponding to the drain and the pixel electrode is provided in the color filter layer and the passivation layer;
the pixel electrode is disposed on the passivation layer and is electrically connected with the drain through the third via; and
the black matrix is disposed over the pixel electrode.
1 Assignment
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Accused Products
Abstract
Disclosed is a display substrate, including: a substrate; gate lines and data lines arranged in a crisscrossed pattern on the substrate; pixel units surrounded by the gate lines and the data lines, each of which includes a thin film transistor and a pixel electrode; a color filter layer disposed on the substrate and including at least one color region, a vertical projection of the pixel electrode within one of the pixel units on the substrate being within a vertical projection of one color region of the color filter layer on the substrate; and a black matrix disposed over the gate lines, the data lines and the thin film transistors, a vertical projection of all of the gate lines, the data lines and the thin film transistors on the substrate being within a vertical projection of the black matrix on the substrate.
11 Citations
13 Claims
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1. A display substrate, including:
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a substrate; gate lines and data lines arranged in a crisscrossed pattern on the substrate; pixel units defined by the gate lines and the data lines, each of which includes a thin film transistor and a pixel electrode; a color filter layer disposed on the substrate and including at least one color region, a vertical projection of the pixel electrode within one of the pixel units on the substrate being within a vertical projection of one color region of the color filter layer on the substrate; and a black matrix disposed over the gate lines, the data lines and the thin film transistors, a vertical projection of all of the gate lines, the data lines and the thin film transistors on the substrate being within a vertical projection of the black matrix on the substrate; wherein the thin film transistor comprises; an active layer disposed on the substrate; a gate insulation layer disposed on the active layer; a gate disposed on the gate insulation layer; a source/drain insulation layer disposed on the gate, a first via corresponding to a source and a second via corresponding to a drain being provided in the gate insulation layer and the source/drain insulation layer; and the source and the drain disposed on the source/drain insulation layer, the source being connected with the active layer through the first via, and the drain being connected with the active layer through the second via; and wherein; the color filter layer is disposed over the source and the drain; a passivation layer is further provided on the color filter layer on the substrate, and a third via corresponding to the drain and the pixel electrode is provided in the color filter layer and the passivation layer; the pixel electrode is disposed on the passivation layer and is electrically connected with the drain through the third via; and the black matrix is disposed over the pixel electrode. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method of manufacturing a display substrate, including steps of:
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forming, on a substrate, a pattern including gate lines and data lines arranged in a crisscrossed pattern, thin film transistors and pixel electrodes, the thin film transistors and the pixel electrodes being disposed within pixel units defined by the gate lines and the data lines; and forming patterns of a color filter layer and a black matrix on the substrate, wherein, the color filter layer includes at least one color region, and a vertical projection of the pixel electrode within one of the pixel units on the substrate is within a vertical projection of one color region of the color filter layer on the substrate; and the black matrix is disposed over the gate lines, the data lines and the thin film transistors, and a vertical projection of all of the gate lines, the data lines and the thin film transistors on the substrate is within a vertical projection of the black matrix on the substrate; wherein the step of forming, on the substrate, the pattern including gate lines and data lines arranged in a crisscrossed pattern, thin film transistors and pixel electrodes includes steps of; forming a semiconductor layer on the substrate, and forming a pattern including an active layer through a patterning process; forming a gate insulation layer on the substrate on which the pattern of the active layer has been formed; forming a gate metal layer on the substrate on which the gate insulation layer has been formed, and forming a pattern including the gate lines and gates through a patterning process; forming a source/drain insulation layer on the substrate on which the pattern of the gate lines and gates have been formed, and forming first vias corresponding to sources and second vias corresponding to drains in the gate insulation layer and the source/drain insulation layer through a patterning process; and forming a source/drain metal layer on the substrate on which the source/drain insulation layer has been formed, and forming a pattern including the data lines, the sources and the drains through a patterning process, the sources being connected with the active layer through the first vias and the drains being connected with the active layer through the second vias, so that the pattern of the gate lines, the data lines and the thin film transistors is formed; the method further including steps of; on the substrate on which the pattern of the color filter layer has been formed, forming a passivation layer, and forming a pattern of third vias, which correspond to the drains and the pixel electrodes, on the pattern of the passivation layer and the color filter layer through a patterning process; and before forming the passivation layer, forming a pattern of a common electrode on the substrate on which the pattern of the color filter layer has been formed, the common electrode being formed between the color filter layer and the passivation layer. - View Dependent Claims (11, 12, 13)
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Specification