Nonvolatile memory system and operating method of memory controller
First Claim
1. An operating method of a memory controller configured to control a nonvolatile memory device including a plurality of memory cells, the operating method comprising:
- programming evaluation data into desired memory cells among the plurality of memory cells;
performing charge loss evaluation on the desired memory cells after a time elapses from a time point when the evaluation data is programmed, the charge loss evaluation including an operation of detecting threshold voltage variation of the desired memory cells over a period based on the time elapsed from the time point when the evaluation data is programmed;
storing a result of the charge loss evaluation; and
adjusting levels of a plurality of read voltages used in the nonvolatile memory device based on the stored result of the charge loss evaluation.
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Abstract
An operating method of a memory controller configured to control a nonvolatile memory device including a plurality of memory cells is provided. The operating method includes: programming evaluation data into desired memory cells among the plurality of memory cells; performing initial verify shift (IVS) charge loss evaluation on the desired memory cells after a time elapses from a time point when the evaluation data is programmed, the IVScharge loss evaluation including an operation of detecting threshold voltage variation of the desired memory cells over a period based on the time elapsed from the time point when the evaluation data is programmed; and storing a result of the IVScharge loss evaluation; and adjusting levels of a plurality of read voltages used in the nonvolatile memory device based on the stored result of the charge loss evaluation.
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Citations
20 Claims
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1. An operating method of a memory controller configured to control a nonvolatile memory device including a plurality of memory cells, the operating method comprising:
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programming evaluation data into desired memory cells among the plurality of memory cells; performing charge loss evaluation on the desired memory cells after a time elapses from a time point when the evaluation data is programmed, the charge loss evaluation including an operation of detecting threshold voltage variation of the desired memory cells over a period based on the time elapsed from the time point when the evaluation data is programmed; storing a result of the charge loss evaluation; and adjusting levels of a plurality of read voltages used in the nonvolatile memory device based on the stored result of the charge loss evaluation. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A nonvolatile memory system comprising:
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a nonvolatile memory device including a plurality of memory cells; and a memory controller configured to program evaluation data into desired memory cells among the plurality of memory cells, perform charge loss evaluation on the desired memory cells in which the evaluation data is stored after a threshold time elapses from a time point when the evaluation data is programmed, and store a result of the charge loss evaluation in an charge loss evaluation table, the charge loss evaluation including an operation of detecting threshold voltage variation of the desired memory cells over a period based on the time elapsed from the time point when the evaluation data is programmed. - View Dependent Claims (11, 12, 13, 14, 15)
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16. An method of operating a memory system including a controller configured to control a nonvolatile memory device, the nonvolatile memory device including a plurality of memory cells, the operating method comprising:
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performing charge loss evaluation on first memory cells among the plurality of memory cells, the first memory cells being programmed with evaluation data, after a time elapses from a time point when the first memory cells were programmed with evaluation data; storing a result of the performing the charge loss evaluation on the first memory cells; and controlling a read operation of the first memory cells based on the result of the performing the charge loss evaluation on the first memory cells. - View Dependent Claims (17, 18, 19, 20)
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Specification