Method for read disturbance management in non-volatile memory devices

• US 9,361,182 B2
• Filed: 05/20/2014
• Issued: 06/07/2016
• Est. Priority Date: 05/20/2014
• Status: Active Grant

• Current Assignee: Transcend Information Incorporated
• Original Assignee: Transcend Information Incorporated
• Inventors: Hu, Kun-Juao, Chen, Hsieh-Chun
• Primary Examiner(s): LAMARRE, GUY J
• Application Number:
  US14/281,910
• Publication Number:
  US 20150339188A1
• Time in Patent Office: 749 Days
• US Class Current: 1/1
• CPC Class Codes: G06F 11/10 Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G06F 11/1072 in multilevel memories
• CPC Class Codes: G06F 11/30 Monitoring
• CPC Class Codes: G06F 11/3034 where the computing system component is a storage system, e.g. DASD based or network based digital input from or digital output to record carriers G06F3/06; digital recording or reproducing G11B20/18; for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS], H04L67/1097
• CPC Class Codes: G06F 11/3037 where the computing system component is a memory, e.g. virtual memory, cache accessing, addressing or allocating within memory systems or architectures G06F12/00; checking stores for correct operation G11C29/00
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2201/81 Threshold
• CPC Class Codes: G06F 2201/88 Monitoring involving counting
• CPC Class Codes: G06F 2212/7206 Reconfiguration of flash memory system
• CPC Class Codes: G06F 2212/7209 Validity control, e.g. using flags, time stamps or sequence numbers
• CPC Class Codes: G06F 2212/7211 Wear leveling
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents

Abstract

When performing a read operation on a non-volatile memory device which includes a plurality of memory sections each corresponding to a plurality of data units, the read count of a specific memory section and the error bits of its corresponding data units are monitored for determining whether data relocation should be perform. When the read count of the specific section exceeds a read count threshold and the error bits of any corresponding data unit exceeds an error threshold, data is moved from the specific memory section to another memory section of the non-volatile memory device, thereby preventing read disturbance from occurring in the specific memory sections.

Claims

1. A method for read disturbance management in a non-volatile memory device which includes a plurality of memory sections each having a plurality of data units, the method comprising:

performing a read operation on the plurality of data units;

updating a read count of a first memory section among the plurality of memory sections according to a total read number of the read operation which has been performed on the plurality of data units of the first memory section since data was last written into the first memory section;

scanning the first memory section for acquiring error bits in all corresponding data units when the read count of the first memory section exceeds a first read count threshold, and updating the first read count threshold to a second read count threshold and resetting the read count of the first memory section when the error bits in all corresponding data units do not exceed an error threshold, wherein the second read count threshold is smaller than the first read count threshold; and

moving the data from the first memory section to a second memory section among the plurality of memory sections when the error bits in any corresponding data unit exceeds the error threshold.

2. The method of claim 1, further comprising:

resetting the read count of the first memory section after moving the data from the first memory section to the second memory section.

3. The method of claim 1, wherein the first read count threshold is determined according to at least one of a type, a status or an ambient environment of the non-volatile memory device.

4. The method of claim 1, further comprising:

setting the error threshold according to an error detection scheme adopted by the non-volatile memory device for acquiring the error bits.

5. The method of claim 1, wherein the plurality of the memory sections correspond to physical storage space of the non-volatile memory device.

6. The method of claim 1, wherein the plurality of the memory sections correspond to logical storage space of the non-volatile memory device.

7. A method for read disturbance management in a flash memory device which includes a plurality of blocks each having a plurality of pages, the method comprising:

performing a read operation on the plurality of pages;

updating a read count of a first block among the plurality of blocks according to a total number of the read operation which has been performed on the plurality of pages of the first block since data was last written into the first block;

scanning the first block for acquiring error bit values of all pages in the first block when the read count of the first block exceeds a first read count threshold, and updating the first read count threshold to a second read count threshold and resetting the read count of the first block when the error bit values of all pages in the first block do not exceed an error threshold, wherein the second read count threshold is smaller than the first read count threshold; and

moving the data from the first block to a second block among the plurality of blocks when the error bit value of any page in the first block exceeds the error threshold.

8. The method of claim 7, further comprising:

resetting the read count of the first block after moving the data from the first block to the second block.

9. The method of claim 7, further comprising:

setting the first read count threshold according to at least one of a type, a status or an ambient environment of the flash memory device.

10. The method of claim 9, further comprising:

setting the first read count threshold to a first value when the flash memory device adopts a single level cell (SLC) structure or to a second value when the flash memory device adopts a multi-level cell (MLC) structure, wherein the first value is larger than the second value.

11. The method of claim 9, wherein the first read count threshold or the second read count threshold is smaller than a maximum allowable read times associated with a guaranteed Programming/Erase (P/E) cycle of the flash memory device.

12. The method of claim 9, further comprising:

setting the first read count threshold to a first value when the flash memory device has a first wear level or to a second value when the flash memory device has a second wear level, wherein the first value is larger than the second value when the first wear level is lower than the second wear level.

13. The method of claim 9, further comprising:

setting the first read count threshold to a first value when the flash memory device operates at a first temperature or to a second value when the flash memory device operates at a second temperature, wherein the first value is larger than the second value when the first temperature is different from the second temperature by a predetermined amount.