FinFET with dielectric isolated channel
First Claim
1. A semiconductor structure comprising:
- a semiconductor substrate;
a punchthrough stopper region formed on the semiconductor substrate, wherein the punchthrough stopper (PTS) region comprises a doped region of the semiconductor substrate and comprises a (100) crystalline surface;
an insulator region formed on a portion of the punchthrough stopper region;
a gate formed on the insulator region;
a fin formed over the punchthrough stopper region, and traversing the gate; and
an epitaxial semiconductor region disposed on the fin, and in direct physical contact with a bottom surface of the fin, and wherein the epitaxial semiconductor region is also in direct physical contact with the punchthrough stopper region.
1 Assignment
0 Petitions
Accused Products
Abstract
Embodiments of the present invention provide a fin type field effect transistor (FinFET) and methods of fabrication. A punchthrough stopper region is formed on a semiconductor substrate. An insulator layer, such as silicon oxide, is formed on the punchthrough stopper. Fins and gates are formed on the insulator layer. The insulator layer is then removed from under the fins, exposing the punchthrough stopper. An epitaxial semiconductor region is grown from the punchthrough stopper to envelop the fins, while the insulator layer remains under the gate. By growing the fin merge epitaxial region mainly from the punchthrough stopper, which is part of the semiconductor substrate, it provides a higher growth rate then when growing from the fins. The higher growth rate provides better epitaxial quality and dopant distribution.
-
Citations
20 Claims
-
1. A semiconductor structure comprising:
-
a semiconductor substrate; a punchthrough stopper region formed on the semiconductor substrate, wherein the punchthrough stopper (PTS) region comprises a doped region of the semiconductor substrate and comprises a (100) crystalline surface; an insulator region formed on a portion of the punchthrough stopper region; a gate formed on the insulator region; a fin formed over the punchthrough stopper region, and traversing the gate; and an epitaxial semiconductor region disposed on the fin, and in direct physical contact with a bottom surface of the fin, and wherein the epitaxial semiconductor region is also in direct physical contact with the punchthrough stopper region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
-
-
10. A semiconductor structure comprising:
-
a semiconductor substrate; a punchthrough stopper region formed on the semiconductor substrate, wherein the punchthrough stopper (PTS) region comprises a doped region of the semiconductor substrate and comprises a (100) crystalline surface; an insulator region formed on a portion of the punchthrough stopper region; a gate formed on the insulator region; a plurality of fins formed over the punchthrough stopper region, and traversing the gate, wherein each fin of the plurality of fins has a width ranging from about 6 nanometers to about 12 nanometers; and an epitaxial semiconductor region disposed on the plurality of fins, and in direct physical contact with a bottom surface of each fin, and wherein the epitaxial semiconductor region is also in direct physical contact with the punchthrough stopper region. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17)
-
-
18. A method of forming a semiconductor structure, comprising:
-
forming a punchthrough stopper region having a (100) crystalline surface on a semiconductor substrate by doping a top surface of the semiconductor substrate; forming an insulator layer on the punchthrough stopper region; forming a plurality of fins on the insulator layer; forming a gate on the insulator layer, such that the plurality of fins traverse the gate; removing the insulator layer from under the plurality of fins, while preserving a portion of the insulator layer disposed directly underneath the gate; and forming an epitaxial semiconductor region disposed on the plurality of fins, and in direct physical contact with a bottom surface of each fin, and in direct physical contact with the punchthrough stopper region. - View Dependent Claims (19, 20)
-
Specification