Methods and systems for energy-efficient communications interface
First Claim
Patent Images
1. A system for interconnection of two or more integrated circuit devices using a vector signaling code to communicate binary data, the system comprising:
- a collection of interconnection wires connecting the two or more integrated circuit devices, the wires representing an essentially capacitive load;
a transmission interface to the collection of interconnection wires in at least one of the integrated circuit devices;
an encoder configured to receive the binary data and to responsively generate a vector signaling code word of three or more levels in the transmission interface;
a transmit driver configured to communicate the vector signaling code word from the transmission interface as three or more signal levels, the three or more signal levels comprising ‘
+’
, ‘
0’
, and ‘
−
’
levels on the interconnection wires, the transmit driver comprising;
transistors connected to supply voltages, the transistors configured to source and sink current to and from the essentially capacitive load of a corresponding wire during transitions from ‘
0’
to ‘
+’ and
‘
0’
to ‘
−
’
, respectively; and
a storage element configured to store charge from the essentially capacitive load of a first wire during a first transition from a ‘
+’
to a ‘
0’
, and in a subsequent transition on a second wire from a ‘
−
’
to a ‘
0,’
the storage element configured to source current to charge the essentially capacitive load of the second wire to a ‘
0’
.
1 Assignment
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Accused Products
Abstract
In a high-impedance communications interface, driver energy consumption is proportional to the number of signal transitions. For signals having three or more distinct levels, it is possible for a signal driver to salvage energy from some downward signal transitions and reuse it on some subsequent upward signal transitions. To facilitate this energy-conserving behavior, communication is performed using group signaling over sets of wires using a vector signaling code, with the design and use of the vector signaling code insuring that energy availability is balanced with energy demand.
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Citations
20 Claims
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1. A system for interconnection of two or more integrated circuit devices using a vector signaling code to communicate binary data, the system comprising:
-
a collection of interconnection wires connecting the two or more integrated circuit devices, the wires representing an essentially capacitive load; a transmission interface to the collection of interconnection wires in at least one of the integrated circuit devices; an encoder configured to receive the binary data and to responsively generate a vector signaling code word of three or more levels in the transmission interface; a transmit driver configured to communicate the vector signaling code word from the transmission interface as three or more signal levels, the three or more signal levels comprising ‘
+’
, ‘
0’
, and ‘
−
’
levels on the interconnection wires, the transmit driver comprising;transistors connected to supply voltages, the transistors configured to source and sink current to and from the essentially capacitive load of a corresponding wire during transitions from ‘
0’
to ‘
+’ and
‘
0’
to ‘
−
’
, respectively; anda storage element configured to store charge from the essentially capacitive load of a first wire during a first transition from a ‘
+’
to a ‘
0’
, and in a subsequent transition on a second wire from a ‘
−
’
to a ‘
0,’
the storage element configured to source current to charge the essentially capacitive load of the second wire to a ‘
0’
. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
-
-
9. A method for communication of binary data using a vector signaling code between a transmitting integrated circuit device and at least one receiving integrated circuit device, the method comprising:
-
encoding the binary data as a vector signaling code word comprising symbols having three or more values, the three or more values comprising a high value (‘
+’
), a middle value (‘
0’
), and a low value (‘
−
’
);transmitting the vector signaling code word as signal levels in one transmission interval on a set of wires, wherein a transition from a ‘
−
’
to a ‘
0’
on a second wire uses energy stored within a storage element, the stored energy recovered from an essentially capacitive load associated with a first wire during a transition from a ‘
+’
to a ‘
0’
in a prior transmission interval. - View Dependent Claims (10, 11, 12, 13, 14, 15)
-
-
16. A method comprising:
-
receiving a set of signals representing binary input data; encoding the set of signals into symbols of a vector signaling code word, wherein each symbol is represented at least as one of a high level (‘
+’
), a medium level (‘
0’
), or a low level (‘
−
’
);transmitting the symbols of the vector signaling code word over a plurality of wires, each of the wires representing an essentially capacitive load; sourcing and sinking charge from supply voltages, using transistors, to the essentially capacitive load of a corresponding wire on transitions from ‘
0’
to ‘
+’ and
from ‘
0’
to ‘
−
’
, respectively;storing charge from the essentially capacitive load of a first wire in a storage element during a first transition from a ‘
+’
to a ‘
0’
; and
,in a subsequent transition on a second wire from a ‘
−
’
to a ‘
0,’
sourcing current from the storage element to charge the essentially capacitive load of the second wire to a ‘
0’
. - View Dependent Claims (17, 18, 19, 20)
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Specification
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Current AssigneeKandou Labs, SA
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Original AssigneeKandou Labs, SA
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InventorsSimpson, Richard, Stewart, Andrew Kevin John, Holden, Brian, Shokrollahi, Amin
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Primary Examiner(s)Washburn, Daniel
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Assistant Examiner(s)Singh, Amneet
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Application NumberUS14/014,082Publication NumberTime in Patent Office1,013 DaysField of SearchUS Class Current1/1CPC Class CodesG06F 13/385 for adaptation of a particu...H04B 1/06 ReceiversY02D 10/00 Energy efficient computing,...
