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Methods and systems for energy-efficient communications interface

  • US 9,362,962 B2
  • Filed: 08/29/2013
  • Issued: 06/07/2016
  • Est. Priority Date: 05/20/2010
  • Status: Active Grant
First Claim
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1. A system for interconnection of two or more integrated circuit devices using a vector signaling code to communicate binary data, the system comprising:

  • a collection of interconnection wires connecting the two or more integrated circuit devices, the wires representing an essentially capacitive load;

    a transmission interface to the collection of interconnection wires in at least one of the integrated circuit devices;

    an encoder configured to receive the binary data and to responsively generate a vector signaling code word of three or more levels in the transmission interface;

    a transmit driver configured to communicate the vector signaling code word from the transmission interface as three or more signal levels, the three or more signal levels comprising ‘

    +’

    , ‘

    0’

    , and ‘





    levels on the interconnection wires, the transmit driver comprising;

    transistors connected to supply voltages, the transistors configured to source and sink current to and from the essentially capacitive load of a corresponding wire during transitions from ‘

    0’

    to ‘

    +’ and



    0’

    to ‘





    , respectively; and

    a storage element configured to store charge from the essentially capacitive load of a first wire during a first transition from a ‘

    +’

    to a ‘

    0’

    , and in a subsequent transition on a second wire from a ‘





    to a ‘

    0,’

    the storage element configured to source current to charge the essentially capacitive load of the second wire to a ‘

    0’

    .

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