Sensor protection

• US 9,366,720 B2
• Filed: 01/26/2012
• Issued: 06/14/2016
• Est. Priority Date: 01/27/2011
• Status: Active Grant

• Current Assignee: Sensirion AG (Sensirion Holding AG)
• Original Assignee: Sensirion AG (Sensirion Holding AG)
• Inventors: Graf, Markus, Streiff, Matthias, Hunziker, Werner, Schanz, Christoph
• Primary Examiner(s): Phan, Huy Q
• Assistant Examiner(s): Rhodes-Vivour, Temilade
• Application Number:
  US13/981,651
• Publication Number:
  US 20140028340A1
• Time in Patent Office: 1,601 Days
• US Class Current: 1/1
• CPC Class Codes: B81C 1/00333 Aspects relating to packaging of MEMS devices, not covered by groups B81C1/00269 - B81C1/00325
• CPC Class Codes: G01N 33/0027 concerning the detector
• CPC Class Codes: G01R 31/2831 Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates G01R31/318511 takes precedence; testing during manufacture H01L22/00
• CPC Class Codes: G09G 1/00 Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of datacathode-ray oscilloscopes G01R13/20; radar display arrangements G01S7/04; display of digital non-picture data in television systems H04N7/0255
• CPC Class Codes: H01L 21/00 Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
• CPC Class Codes: H01L 2221/00 Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
• CPC Class Codes: H01L 2224/13 of an individual bump connector
• CPC Class Codes: H01L 24/94 at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices

Abstract

In a method for manufacturing a sensor chip a spacer (3) is arranged at the front side (11) of a substrate (1) at which front side (11) a sensing element (2) is arranged, too. Holes (14) are etched for building vias (15) extending through the substrate (1) between the front side (11) of the substrate (1) and its back side (12). After etching, the holes (14) are filled with conductive material to complete the vias (15). The spacer (3) provides protection to the sensing element (2) and the sensing chip throughout the manufacturing process.

Claims

1. Method for manufacturing a sensor chip, comprising the steps of

providing a substrate with a front side and a back side,

arranging a sensing element at the front side,

arranging a spacer at the front side,

etching holes into the substrate, and

filling the holes with a conducting material for building vias extending through the substrate between the front side and the back side,

wherein the sensor chip is arranged on a chuck with the spacer facing the chuck for electrically contacting contact pads arranged at the back side with electrodes,

wherein the substrate is provided in form of a wafer for building multiple sensor chips from, and

wherein sensing elements and conductors for multiple sensor chips are arranged at the front side of the wafer,

wherein multiple spacers for multiple sensor chips are arranged at the front side of the wafer,

wherein the step of etching holes through the wafer and filling the holes for building vias for multiple sensor chips is applied prior to or after the spacers are arranged at the wafer, and

wherein the previous four steps are implemented prior to separating the wafer into multiple sensor chips.

2. Method according to claim 1, wherein the sensor chip is tested while being arranged on the chuck.

3. Method according to claim 1, wherein the wafer is seated onto the chuck with its spacers, facing the chuck for the purpose of testing the sensor chips.

4. Method according to claim 1 wherein a probe head comprising electrodes is arranged on top of the back side of the wafer and the electrodes are brought into contact with the contact pads.

5. Method according to claim 1, wherein test routines are executed while the sensing elements being protected by the spacers thereby avoiding the sensing elements being in direct contact with the chuck.

6. Method according to claim 1, wherein during testing the wafer is exposed to a medium evoking sensor responses that can be measured by means of the electrodes.

7. Method according to claim 6, wherein the sensor chips are implemented as humidity sensors, and wherein humid air is supplied to the sensing elements on the wafer.

8. Method according to claim 6, wherein the medium is guided through openings in the chuck for accessing the sensing elements facing the chuck.

9. Method according to claim 8, wherein the openings include recesses in a top surface of the chuck, and in particular wherein at least some of the recesses in the top surface of the chuck are arranged in parallel, and in particular are arranged in parallel at a distance corresponding to a distance between two rows of sensor chips on the wafer.

10. Testing device for testing sensor chips provided in form of a wafer, the wafer comprising a front side and a back side, wherein sensing elements and conductors for the multiple sensor chips are arranged at the front side, wherein contact pads are arranged at the back side, wherein vias extend through the wafer between the front side and the back side for electrically connecting the conductors to the contact pads, and wherein spacers are arranged at the front side for protecting the sensing elements, the testing device comprising

a chuck for arranging the wafer on with the spacers facing the chuck for electrically contacting the contact pads arranged at the back side with electrodes, comprising openings in the chuck for guiding a medium through for accessing the one or more sensing elements facing the chuck wherein the openings include recesses in a top surface of the chuck.

11. Testing device according to claim 10, wherein the openings include ducts in the chuck for connecting the recesses to a medium supply.

12. Testing device according to claim 11, wherein at least some of the recesses in the top surface of the chuck are arranged in parallel, and in particular are arranged in parallel at a distance corresponding to a distance between two rows of sensor chips on the wafer.

13. Testing device according to claim 12, wherein others of the recesses are arranged orthogonal to the at least some of the recesses for building a recess grid.

14. Testing device according to claim 10, comprising a medium supply for supplying the medium during testing for exposing the sensor chip or sensor chips to the medium for evoking sensor responses that can be measured by means of the electrodes.

15. Testing device according to claim 14, wherein the medium supply is connected to one or more of the recesses of the chuck.

16. Testing device according to claim 14, wherein the medium supply is connected to an inlet of the chuck arranged in a side wall of the chuck.

17. Testing device according to claim 14, comprising a probe head comprising electrodes, the probe head being arranged on top of the back side of the wafer when being arranged on the chuck and the electrodes being brought into contact with the contact pads of the wafer.