Reversible connector for accessory devices
First Claim
1. A method implemented by a host computing device comprising:
- detecting connection of a connector to an accessory port of the host computing device based on signals conveyed via a pair of detection pins allocated in the connector;
ascertaining an orientation of the connection of the connector to the accessory port based on the signals, the signals indicating a logic state combination for the pair of detection pins, the logic state combination indicating whether an accessory device connected via the connector is a one wire device or a two wire device; and
configuring a switching mechanism of the host computing device to route signals according to the ascertained orientation and the logic state combination.
3 Assignments
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Accused Products
Abstract
Reversible connectors for accessory devices are described. In one or more implementations, a connector cable for an accessory of a host computing device is configured such that a head of the connector cable may be plugged into a corresponding port of the host in either orientation (straight or reverse). The host computing device is configured to sample signals associated with allocated pins of the connector to detect connection of the connector to an accessory port and to ascertain an orientation of the connector. A combination of high and low values of signals conveyed via these allocated pins upon insertion of the connector may be used by a controller of the host to distinguish between different types of devices and to resolve the orientation of the connector cable. A switching mechanism of the host computing device may then be configured to automatically route signals accordingly.
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Citations
20 Claims
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1. A method implemented by a host computing device comprising:
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detecting connection of a connector to an accessory port of the host computing device based on signals conveyed via a pair of detection pins allocated in the connector; ascertaining an orientation of the connection of the connector to the accessory port based on the signals, the signals indicating a logic state combination for the pair of detection pins, the logic state combination indicating whether an accessory device connected via the connector is a one wire device or a two wire device; and configuring a switching mechanism of the host computing device to route signals according to the ascertained orientation and the logic state combination. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A host computing device comprising:
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one or more microcontrollers; an accessory port connectable to a connector for an accessory device; one or more computer-readable storage media storing instructions that when executed via the one or more microcontrollers cause the host computing device to perform operations including; detecting insertion of the connector into the accessory port via a pair of detection pins integrated with the connector; obtaining a logic state combination of high and low logic states conveyed via the pair of detection pins; determining a device type for the accessory device as a one wire device or a two wire device based upon the logic state combination; ascertaining an orientation of the connector inserted in the accessory port including; when the device type is a one wire device, determining the orientation of the connection directly from the logic state combination;
orwhen the device type is a two wire device, sampling resistor values for one or more identity resistors of the accessory device via the pair of detection pins to establish validity states indicative of the orientation; and setting-up signal routing according to the type of device and ascertained orientation. - View Dependent Claims (11, 12, 13, 14, 15)
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16. A host computing device comprising:
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a processing system; and one or more computer-readable storage media storing instructions that when executed via the processing system cause the host computing device to implement a security module that is configured to; detect connection of a connector for an accessory device to an accessory port of the host computing device based on a logic state combination obtained via a pair of detection pins integrated with the connector, the connector and accessory port configured to support reversible connection of the connector to the accessory port; identify a device type of the accessory device according to the logic state combination, the logic state combination indicating whether the accessory device is a one wire device or a two wire device; ascertain an orientation of the connection of the connector to the accessory port; and configure a switching mechanism of the host computing device to automatically route signals according to the identified device type and the ascertained orientation. - View Dependent Claims (17, 18, 19, 20)
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Specification