×

Accurate persistent nodes

  • US 9,367,794 B2
  • Filed: 02/15/2013
  • Issued: 06/14/2016
  • Est. Priority Date: 05/06/2005
  • Status: Active Grant
First Claim
Patent Images

1. A calibrated gate biasing circuit, comprising:

  • a switched capacitor precision resistor comprising at least two transistors and at least two corresponding capacitors, wherein a bias current flowing through the switched capacitor precision resistor is about 0.2 picoamperes (pA); and

    a matrix of forward biased diodes coupled to an outlet of the switched capacitor precision resistor.

View all claims
  • 2 Assignments
Timeline View
Assignment View
    ×
    ×