Accurate persistent nodes
First Claim
1. A calibrated gate biasing circuit, comprising:
- a switched capacitor precision resistor comprising at least two transistors and at least two corresponding capacitors, wherein a bias current flowing through the switched capacitor precision resistor is about 0.2 picoamperes (pA); and
a matrix of forward biased diodes coupled to an outlet of the switched capacitor precision resistor.
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Accused Products
Abstract
A calibrated gate biasing circuit according to one embodiment includes a switched capacitor precision resistor; and a voltage reference. An electronic circuit for initiating a change in state of a host device, according to another embodiment, includes a counter coupled to a host device, the counter counting at a fixed interval, wherein the counter is reset to zero upon receiving a command from a remote device, wherein the count is compared to a reference value, wherein the host device changes states if the count matches the reference value, wherein operation of the counter continues in spite of an interruption in power supply from a power source. Asymmetrical differential amplifiers are also disclosed, according to various embodiments.
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Citations
5 Claims
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1. A calibrated gate biasing circuit, comprising:
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a switched capacitor precision resistor comprising at least two transistors and at least two corresponding capacitors, wherein a bias current flowing through the switched capacitor precision resistor is about 0.2 picoamperes (pA); and a matrix of forward biased diodes coupled to an outlet of the switched capacitor precision resistor. - View Dependent Claims (2, 3, 4, 5)
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Specification