Nonvolatile memory device having wear-leveling control and method of operating the same
First Claim
1. A method of controlling a write operation in a nonvolatile memory device to provide wear leveling, the nonvolatile memory device comprising a plurality of memory blocks, the method comprising:
- reading write indication information with respect to at least a selected memory block of the plurality of memory blocks;
determining whether a write order of data to be stored in the selected memory block is an ascending order or a descending order, based on the write indication information of the selected memory block; and
generating addresses of memory regions in the selected memory block in an ascending order when the write order of the data is determined to be an ascending order, and generating addresses of the memory regions in the selected memory block in a descending order when the write order is determined to be a descending order, whereinthe write indication information comprises, for each of the plurality of memory blocks, a respective power-on counting value that indicates the number of times the memory block has been powered on.
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Abstract
A method is provided for controlling a write operation in a nonvolatile memory device to provide wear leveling, where the nonvolatile memory device includes multiple memory blocks. The method includes reading write indication information with respect to at least a selected memory block of the multiple memory blocks; determining whether a write order of data to be stored in the selected memory block is an ascending order or a descending order, based on the write indication information of the selected memory block; and generating addresses of memory regions in the selected memory block in an ascending order when the write order of the data is determined to be an ascending order, and generating addresses of the memory regions in the selected memory block in a descending order when the write order is determined to be a descending order.
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Citations
22 Claims
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1. A method of controlling a write operation in a nonvolatile memory device to provide wear leveling, the nonvolatile memory device comprising a plurality of memory blocks, the method comprising:
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reading write indication information with respect to at least a selected memory block of the plurality of memory blocks; determining whether a write order of data to be stored in the selected memory block is an ascending order or a descending order, based on the write indication information of the selected memory block; and generating addresses of memory regions in the selected memory block in an ascending order when the write order of the data is determined to be an ascending order, and generating addresses of the memory regions in the selected memory block in a descending order when the write order is determined to be a descending order, wherein the write indication information comprises, for each of the plurality of memory blocks, a respective power-on counting value that indicates the number of times the memory block has been powered on. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A memory controller, comprising:
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an address conversion controller configured to convert logical addresses, applied when a write operation is performed on one of a plurality of memory blocks in a nonvolatile memory device, into physical addresses in an ascending order or a descending order according to write indication information of the one memory block; and an address generator configured to receive the physical addresses and to generate corresponding row select addresses for selecting at least one memory region of a plurality of memory regions in the one memory block, wherein the write indication information comprises, for each of the plurality of memory blocks, a respective power-on counting value that indicates the number of times the memory block has been powered on. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19. A nonvolatile memory device, comprising:
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a memory cell array comprising a plurality of memory blocks, each memory block comprising of a plurality of memory regions; a counting value memory configured to store write indication information with respect to each memory block; and control logic configured to perform a write operation according to a write order of data to be stored in a selected memory block of the plurality of memory blocks, the write order being one of an ascending order or a descending order of memory regions in the selected memory block determined based on the stored write indication information with respect to the selected memory block, wherein the write indication information comprises, for each of the plurality of memory blocks, a respective power-on counting value that indicates the number of times the memory block has been powered on. - View Dependent Claims (20, 21, 22)
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Specification