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Landing pad in peripheral circuit for magnetic random access memory (MRAM)

  • US 9,373,663 B2
  • Filed: 09/20/2013
  • Issued: 06/21/2016
  • Est. Priority Date: 09/20/2013
  • Status: Active Grant
First Claim
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1. A memory device including:

  • a magnetic memory cell region including at least a magnetic tunnel junction (MTJ) memory element having a variable resistance; and

    a peripheral circuit region comprising;

    a substrate and a bottom contact formed therein;

    a landing pad formed on top of said bottom contact, said landing pad comprising a first magnetic layer structure and a second magnetic layer structure with a degraded insulating junction layer interposed therebetween, thereby allowing electric current to conduct through said landing pad; and

    a via formed on top of said landing pad,wherein neither said landing pad nor said via is directly connected to an MTJ memory element.

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