3-D inductor and transformer
First Claim
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1. A structure comprising:
- a semiconductor die comprising;
a first metallization layer comprising a first conductive pattern; and
a second metallization layer over the first metallization layer, the second metallization layer comprising a second conductive pattern;
an interposer comprising;
a third metallization layer on a first side of the interposer, the third metallization layer comprising a third conductive pattern; and
a fourth metallization layer over the third metallization layer, the fourth metallization layer comprising a fourth conductive pattern; and
a first set of conductive bumps bonding the semiconductor die to the interposer, at least one of the first set of conductive bumps electrically coupling one of the first conductive pattern and the second conductive pattern to one of the third conductive pattern and the fourth conductive pattern to form a first coil, and at least one other of the first set of conductive bumps electrically coupling one of the first conductive pattern and the second conductive pattern to one of the third conductive pattern and fourth conductive pattern to form a second coil, the first coil being distinct from the second coil.
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Abstract
In accordance with an embodiment, a semiconductor device comprises a semiconductor die, an interposer, and conductive bumps bonding the semiconductor die to the interposer. The semiconductor die comprises a first metallization layer, and the first metallization layer comprises a first conductive pattern. The interposer comprises a second metallization layer, and the second metallization layer comprises a second conductive pattern. Some of the conductive bumps electrically couple the first conductive pattern to the second conductive pattern to form a coil. Other embodiments contemplate other configurations of coils, inductors, and/or transformers, and contemplate methods of manufacture.
74 Citations
20 Claims
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1. A structure comprising:
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a semiconductor die comprising; a first metallization layer comprising a first conductive pattern; and a second metallization layer over the first metallization layer, the second metallization layer comprising a second conductive pattern; an interposer comprising; a third metallization layer on a first side of the interposer, the third metallization layer comprising a third conductive pattern; and a fourth metallization layer over the third metallization layer, the fourth metallization layer comprising a fourth conductive pattern; and a first set of conductive bumps bonding the semiconductor die to the interposer, at least one of the first set of conductive bumps electrically coupling one of the first conductive pattern and the second conductive pattern to one of the third conductive pattern and the fourth conductive pattern to form a first coil, and at least one other of the first set of conductive bumps electrically coupling one of the first conductive pattern and the second conductive pattern to one of the third conductive pattern and fourth conductive pattern to form a second coil, the first coil being distinct from the second coil. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A device comprising:
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a semiconductor die comprising; a first metallization layer comprising a first spiral pattern and a second spiral pattern, the second spiral pattern being distinct from the first spiral pattern, a first part of the first spiral pattern surrounding the second spiral pattern, and the second spiral pattern surrounding a second part of the first spiral pattern; and a second metallization layer on the first metallization layer, the second metallization layer comprising a first cross link and a second cross link; an interposer comprising; a third metallization layer on a first side of a substrate, the third metallization layer comprising a third spiral pattern and a fourth spiral pattern, the fourth spiral pattern being distinct from the third spiral pattern; a fourth metallization layer on the first side of the substrate comprising a third cross link and a fourth cross link; and through substrate vias (TSVs) extending through the substrate; and conductive bumps bonding the semiconductor die to a second side of the interposer, the second side being opposite the first side, the conductive bumps and the TSVs electrically coupling at least one of the first metallization layer and second metallization layer to at least one of the third metallization layer and the fourth metallization layer. - View Dependent Claims (11, 12, 13, 14, 15)
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16. A method comprising:
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forming a plurality of through substrate vias (TSVs) extending through a substrate; forming a first set of trace links on a first side of the substrate, the first set of trace links forming a first conductive pattern; forming a second set of trace links over the first set of trace links, the second set of trace links forming a second conductive pattern; forming a third set of trace links on a second side of the substrate, the second side being opposite the first side, the third set of trace links forming a third conductive pattern; and forming a fourth set of trace links over the third set of trace links, the fourth set of trace links forming a fourth conductive pattern, at least one of the plurality of TSVs electrically coupling the first conductive pattern and the third conductive pattern to form a first coil, at least one other of the plurality of TSVs electrically coupling the second conductive pattern and the fourth conductive pattern to form a second coil, the first coil being distinct from the second coil. - View Dependent Claims (17, 18, 19, 20)
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Specification