Pulse width modulated (PWM) sensor interface using a terminated symmetrical physical layer
First Claim
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1. A device comprising:
- an interface circuit terminating a signal line with an impedance matching an impedance of the signal line, wherein the interface circuit includes;
a pull up switch and a pull down switch connected in series; and
a termination resistor connected between a shared node of the pull up and down switches and the signal line, wherein an impedance of the termination resistor matches the impedance of the signal line; and
a controller configured to transmit or receive data on the signal line through the interface circuit and according to a communication protocol employing pulse width modulation (PWM) for data encoding.
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Abstract
A device, such as a transceiver or a sensor, is provided. An interface circuit of the device terminates a signal line with an impedance matching an impedance of the signal line. A controller of the device is configured to transmit or receive data on the signal line through the interface circuit and according to a communication protocol employing pulse width modulation (PWM) for data encoding. A system having two or more devices with impedance matching interface circuits, and a method for communication with a device having an impedance matching interface circuit, are also provided.
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Citations
23 Claims
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1. A device comprising:
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an interface circuit terminating a signal line with an impedance matching an impedance of the signal line, wherein the interface circuit includes; a pull up switch and a pull down switch connected in series; and a termination resistor connected between a shared node of the pull up and down switches and the signal line, wherein an impedance of the termination resistor matches the impedance of the signal line; and a controller configured to transmit or receive data on the signal line through the interface circuit and according to a communication protocol employing pulse width modulation (PWM) for data encoding. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A system comprising:
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a first device including; a first interface circuit terminating a signal line with an impedance matching an impedance of the signal line, wherein the first interface circuit includes a pull up transistor and a pull down transistor connected in series, and wherein a shared node of the pull up and pull down transistors is connected to the signal line; and a first controller configured to transmit or receive data on the signal line through the first interface circuit and according to a communication protocol employing pulse width modulation (PWM) for data encoding, and is further configured to apply pulses to gates of the pull up and down transistors to dynamically match the impedance of the signal line; and one or more additional devices terminating the signal line with an impedance matching the impedance of the signal line and configured to transmit or receive data on the signal line according to the communication protocol. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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20. A method for communication, said method comprising:
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transmitting or receiving a series of first pulses over a signal line at a transceiver, while simultaneously matching an impedance of the transceiver to an impedance of the signal line; at least one of; encoding data into the series of first pulses; and decoding the series of first pulses into decoded data; and dynamically adjusting the impedance of the transceiver by applying second pulses to gates of a pull up transistor and a pull down transistor both connected to the signal line, wherein the second pulses are based on feedback from the signal line while transmitting or receiving the series of first pulses. - View Dependent Claims (21, 22, 23)
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Specification