Pulse width modulated (PWM) sensor interface using a terminated symmetrical physical layer

• US 9,374,174 B1
• Filed: 01/22/2015
• Issued: 06/21/2016
• Est. Priority Date: 01/22/2015
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Hammerschmidt, Dirk
• Primary Examiner(s): Ha, Dac
• Application Number:
  US14/602,534
• Time in Patent Office: 516 Days
• US Class Current: 1/1
• CPC Class Codes: H04B 14/026 using pulse time characteristics modulation, e.g. width, position, interval
• CPC Class Codes: H04L 25/0278 Arrangements for impedance matching
• CPC Class Codes: H04L 25/4902 Pulse width modulation; Pulse position modulation

Abstract

A device, such as a transceiver or a sensor, is provided. An interface circuit of the device terminates a signal line with an impedance matching an impedance of the signal line. A controller of the device is configured to transmit or receive data on the signal line through the interface circuit and according to a communication protocol employing pulse width modulation (PWM) for data encoding. A system having two or more devices with impedance matching interface circuits, and a method for communication with a device having an impedance matching interface circuit, are also provided.

Claims

1. A device comprising:

an interface circuit terminating a signal line with an impedance matching an impedance of the signal line, wherein the interface circuit includes;

a pull up switch and a pull down switch connected in series; and

a termination resistor connected between a shared node of the pull up and down switches and the signal line, wherein an impedance of the termination resistor matches the impedance of the signal line; and

a controller configured to transmit or receive data on the signal line through the interface circuit and according to a communication protocol employing pulse width modulation (PWM) for data encoding.

2. The device according to claim 1, wherein the controller is configured to transmit or receive the data according to a single edge nibble transmission (SENT) communication protocol or a short PWM code (SPC) communication protocol.

3. The device according to claim 1, further including:

a sensor generating the data, wherein the controller is configured to encode the data according to the communication protocol and to drive the signal line with the encoded data through control of the interface circuit.

4. The device according to claim 1, wherein the interface circuit impedance is between about 0.5-2.0 times the signal line impedance.

5. The device according to claim 1

wherein the controller is configured to control the pull up and down switches to transmit the data on the signal line.

6. The device according to claim 5, wherein the termination resistor includes a first terminal connected to the signal line, and a second terminal connected to a power supply line or a power return line through a capacitor.

7. The device according to claim 1, wherein the interface circuit includes:

a comparator or analog-to-digital converter (ADC) configured to measure a voltage on the signal line and to output a binary measurement signal to the controller; and

wherein the controller is configured to receive the data from the binary measurement signal and to decode the received data according to the communication protocol.

8. The device according to claim 7, further including:

an alternating current (AC) load network connected to the signal line, wherein the AC load network includes a resistor in series with a capacitor.

9. A system comprising:

a first device including;

a first interface circuit terminating a signal line with an impedance matching an impedance of the signal line, wherein the first interface circuit includes a pull up transistor and a pull down transistor connected in series, and wherein a shared node of the pull up and pull down transistors is connected to the signal line; and

a first controller configured to transmit or receive data on the signal line through the first interface circuit and according to a communication protocol employing pulse width modulation (PWM) for data encoding, and is further configured to apply pulses to gates of the pull up and down transistors to dynamically match the impedance of the signal line; and

one or more additional devices terminating the signal line with an impedance matching the impedance of the signal line and configured to transmit or receive data on the signal line according to the communication protocol.

10. The device according to claim 9,

wherein the first controller is configured to control the pull up and down transistors to transmit the data on the signal line.

11. The device according to claim 10, wherein the pull up and down transistors are dimensioned to match the impedance of the signal line.

12. The device according to claim 10, wherein the first controller or a regulator intermediate the first controller and one of the pull up and down transistors is configured to apply pulses to the one of the pull up and down transistors to match the impedance of the signal line based on feedback from the signal line.

13. The device according to claim 12, wherein heights and edges of the pulses are shaped to keep a combined impedance of the pull up and pull down transistors in a range that matches the signal line impedance.

14. The device according to claim 9, wherein heights of the pulses are dimensioned to match impedances of the pull up and pull down transistors to the signal line impedance.

15. The system according to claim 9, wherein the one or more additional devices include:

a second device including;

a second interface circuit terminating the signal line with an impedance matching the impedance of the signal line; and

a second controller configured to transmit or receive data on the signal line through the second interface circuit and according to the communication protocol.

16. The system according to claim 15, wherein the first and second interfaces circuits have the same arrangement of electrical components.

17. The system according to claim 9, wherein the one or more additional devices each have an input impedance being n times the impedance of the signal line, where n is the number of additional devices connected to the signal line.

18. The system according to claim 9, wherein the one or more additional devices are configured to share a token according to the communication protocol, and wherein an additional device having the token is configured to match the impedance of the signal line and to transmit or receive data on the signal line.

19. The system according to claim 9, wherein the first controller is configured to apply the pulses to the pull up and down transistors to maintain at least one of the pull up and down transistors in a triode region.

20. A method for communication, said method comprising:

transmitting or receiving a series of first pulses over a signal line at a transceiver, while simultaneously matching an impedance of the transceiver to an impedance of the signal line;

at least one of;

encoding data into the series of first pulses; and

decoding the series of first pulses into decoded data; and

dynamically adjusting the impedance of the transceiver by applying second pulses to gates of a pull up transistor and a pull down transistor both connected to the signal line, wherein the second pulses are based on feedback from the signal line while transmitting or receiving the series of first pulses.

21. The method according to claim 20, further including:

receiving the series of first pulses by;

comparing a voltage on the signal line to a reference voltage; and

generating a binary output signal based on the comparing.

22. The method according to claim 20, further including:

transmitting the series of first pulses by selectively activating the pull up and down transistors.

23. The method according to claim 20, further comprising:

adjusting shapes of the second pulses to maintain a combined impedance of the pull up and pull down transistors in a range that matches the impedance of the signal line.